component
SN74LVTH126DR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74LVTH126DR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-14
SN74LVTH126DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for buffer 1; output is high-impedance when low |
| 2 | 1A | input | Data input for buffer 1; TTL-compatible, input voltage 0 to 5.5V |
| 3 | 1Y | tri_state | Three-state data output for buffer 1; follows input when 1OE is high, high-impedance when low |
| 4 | 2OE | input | Output enable input for buffer 2; output is high-impedance when low |
| 5 | 2A | input | Data input for buffer 2; TTL-compatible, input voltage 0 to 5.5V |
| 6 | 2Y | tri_state | Three-state data output for buffer 2; follows input when 2OE is high, high-impedance when low |
| 7 | GND | power_in | Ground reference (0V) |
| 8 | 3Y | tri_state | Three-state data output for buffer 3; follows input when 3OE is high, high-impedance when low |
| 9 | 3A | input | Data input for buffer 3; TTL-compatible, input voltage 0 to 5.5V |
| 10 | 3OE | input | Output enable input for buffer 3; output is high-impedance when low |
| 11 | 4Y | tri_state | Three-state data output for buffer 4; follows input when 4OE is high, high-impedance when low |
| 12 | 4A | input | Data input for buffer 4; TTL-compatible, input voltage 0 to 5.5V |
| 13 | 4OE | input | Output enable input for buffer 4; output is high-impedance when low |
| 14 | VCC | power_in | Supply voltage, 2.7V to 3.6V recommended operating range |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74LVTH126DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74lvth126dr-etched.step/sn74lvth126dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvth126dr.step/sn74lvth126dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
070c3051637a66df, retrieved 2026-10-01, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74LVTH126DR
**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-14
SN74LVTH126DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for buffer 1; output is high-impedance when low |
| 2 | 1A | input | Data input for buffer 1; TTL-compatible, input voltage 0 to 5.5V |
| 3 | 1Y | tri_state | Three-state data output for buffer 1; follows input when 1OE is high, high-impedance when low |
| 4 | 2OE | input | Output enable input for buffer 2; output is high-impedance when low |
| 5 | 2A | input | Data input for buffer 2; TTL-compatible, input voltage 0 to 5.5V |
| 6 | 2Y | tri_state | Three-state data output for buffer 2; follows input when 2OE is high, high-impedance when low |
| 7 | GND | power_in | Ground reference (0V) |
| 8 | 3Y | tri_state | Three-state data output for buffer 3; follows input when 3OE is high, high-impedance when low |
| 9 | 3A | input | Data input for buffer 3; TTL-compatible, input voltage 0 to 5.5V |
| 10 | 3OE | input | Output enable input for buffer 3; output is high-impedance when low |
| 11 | 4Y | tri_state | Three-state data output for buffer 4; follows input when 4OE is high, high-impedance when low |
| 12 | 4A | input | Data input for buffer 4; TTL-compatible, input voltage 0 to 5.5V |
| 13 | 4OE | input | Output enable input for buffer 4; output is high-impedance when low |
| 14 | VCC | power_in | Supply voltage, 2.7V to 3.6V recommended operating range |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `SN74LVTH126DR`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `sn74lvth126dr-etched.step` / `sn74lvth126dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvth126dr.step` / `sn74lvth126dr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74lvth126.pdf) (23 pp, sha256 `070c3051637a66df`, retrieved 2026-10-01, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74lvth126dr-datasheet.pdf)