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SN74LVTH125IPWREP

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LVTH125IPWREP

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-14

SN74LVTH125IPWREP from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable for buffer 1; when high, output 1Y is placed in the high-impedance state.
2 1A input Data input for buffer 1 with active bus-hold, which holds an unused or undriven input at a valid logic state; the input accepts up to 5.5 V.
3 1Y tri_state 3-state output of buffer 1, high-impedance when 1OE is high; IOH is limited to -32 mA and IOL to 64 mA.
4 2OE input Output enable for buffer 2; when high, output 2Y is placed in the high-impedance state.
5 2A input Data input for buffer 2 with active bus-hold, which holds an unused or undriven input at a valid logic state; the input accepts up to 5.5 V.
6 2Y tri_state 3-state output of buffer 2, high-impedance when 2OE is high; IOH is limited to -32 mA and IOL to 64 mA.
7 GND power_in Ground reference for the device.
8 3Y tri_state 3-state output of buffer 3, high-impedance when 3OE is high; IOH is limited to -32 mA and IOL to 64 mA.
9 3A input Data input for buffer 3 with active bus-hold, which holds an unused or undriven input at a valid logic state; the input accepts up to 5.5 V.
10 3OE input Output enable for buffer 3; when high, output 3Y is placed in the high-impedance state.
11 4Y tri_state 3-state output of buffer 4, high-impedance when 4OE is high; IOH is limited to -32 mA and IOL to 64 mA.
12 4A input Data input for buffer 4 with active bus-hold, which holds an unused or undriven input at a valid logic state; the input accepts up to 5.5 V.
13 4OE input Output enable for buffer 4; when high, output 4Y is placed in the high-impedance state.
14 VCC power_in Supply voltage, recommended 2.7 V to 3.6 V; the device is in the high-impedance state during power up or power down when VCC is between 0 and 1.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74LVTH125IPWREP
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74lvth125ipwrep-etched.step / sn74lvth125ipwrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvth125ipwrep.step / sn74lvth125ipwrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (10 pp, sha256 eb4f6cf64ea49ce7, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF