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SN74LVT574PWR

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Texas Instruments Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74LVT574PWR

Texas Instruments · Flip Flops · TSSOP-20

SN74LVT574PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Buffered active-low output enable: when high, the eight outputs go to the high-impedance state without affecting the flip-flops, and it should be tied to VCC through a pullup resistor to ensure high impedance during power up or power down.
2 1D input Data input to flip-flop 1, sampled on the positive transition of CLK, with active bus-hold circuitry that holds the input at a valid logic level when floating.
3 2D input Data input to flip-flop 2, sampled on the positive transition of CLK, with active bus-hold circuitry that holds the input at a valid logic level when floating.
4 3D input Data input to flip-flop 3, sampled on the positive transition of CLK, with active bus-hold circuitry that holds the input at a valid logic level when floating.
5 4D input Data input to flip-flop 4, sampled on the positive transition of CLK, with active bus-hold circuitry that holds the input at a valid logic level when floating.
6 5D input Data input to flip-flop 5, sampled on the positive transition of CLK, with active bus-hold circuitry that holds the input at a valid logic level when floating.
7 6D input Data input to flip-flop 6, sampled on the positive transition of CLK, with active bus-hold circuitry that holds the input at a valid logic level when floating.
8 7D input Data input to flip-flop 7, sampled on the positive transition of CLK, with active bus-hold circuitry that holds the input at a valid logic level when floating.
9 8D input Data input to flip-flop 8, sampled on the positive transition of CLK, with active bus-hold circuitry that holds the input at a valid logic level when floating.
10 GND power_in Ground reference for the device.
11 CLK input Clock input; the Q outputs take the logic levels of the D inputs on the positive clock transition, with clock frequency up to 150 MHz and minimum pulse width of 3.3 ns.
12 8Q tri_state Three-state output of flip-flop 8, with recommended IOH of −32 mA and IOL of 64 mA for the SN74LVT574.
13 7Q tri_state Three-state output of flip-flop 7, with recommended IOH of −32 mA and IOL of 64 mA for the SN74LVT574.
14 6Q tri_state Three-state output of flip-flop 6, with recommended IOH of −32 mA and IOL of 64 mA for the SN74LVT574.
15 5Q tri_state Three-state output of flip-flop 5, with recommended IOH of −32 mA and IOL of 64 mA for the SN74LVT574.
16 4Q tri_state Three-state output of flip-flop 4, with recommended IOH of −32 mA and IOL of 64 mA for the SN74LVT574.
17 3Q tri_state Three-state output of flip-flop 3, with recommended IOH of −32 mA and IOL of 64 mA for the SN74LVT574.
18 2Q tri_state Three-state output of flip-flop 2, with recommended IOH of −32 mA and IOL of 64 mA for the SN74LVT574.
19 1Q tri_state Three-state output of flip-flop 1, with recommended IOH of −32 mA and IOL of 64 mA for the SN74LVT574.
20 VCC power_in Supply voltage, recommended 2.7 V to 3.6 V for the SN74LVT574.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LVT574PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74lvt574pwr-etched.step / sn74lvt574pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvt574pwr.step / sn74lvt574pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 5e2b403f93ab6a15, retrieved 2026-10-07, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF