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SN74LVT574DWR

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Texas Instruments Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74LVT574DWR

Texas Instruments · Flip Flops · SOIC-20-300mil

SN74LVT574DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Buffered active-low output enable: when low the eight 3-state outputs are enabled, when high they go to high impedance, and it does not affect the flip-flop internal operation.
2 1D input Data input to flip-flop 1, sampled on the positive CLK transition; bus-hold circuitry holds a floating input at a valid level and recommended input voltage is up to 5.5 V.
3 2D input Data input to flip-flop 2, sampled on the positive CLK transition; bus-hold circuitry holds a floating input at a valid level and recommended input voltage is up to 5.5 V.
4 3D input Data input to flip-flop 3, sampled on the positive CLK transition; bus-hold circuitry holds a floating input at a valid level and recommended input voltage is up to 5.5 V.
5 4D input Data input to flip-flop 4, sampled on the positive CLK transition; bus-hold circuitry holds a floating input at a valid level and recommended input voltage is up to 5.5 V.
6 5D input Data input to flip-flop 5, sampled on the positive CLK transition; bus-hold circuitry holds a floating input at a valid level and recommended input voltage is up to 5.5 V.
7 6D input Data input to flip-flop 6, sampled on the positive CLK transition; bus-hold circuitry holds a floating input at a valid level and recommended input voltage is up to 5.5 V.
8 7D input Data input to flip-flop 7, sampled on the positive CLK transition; bus-hold circuitry holds a floating input at a valid level and recommended input voltage is up to 5.5 V.
9 8D input Data input to flip-flop 8, sampled on the positive CLK transition; bus-hold circuitry holds a floating input at a valid level and recommended input voltage is up to 5.5 V.
10 GND power_in Ground reference for the device.
11 CLK input Clock input; the Q outputs take the logic levels present on the D inputs on each positive transition, with clock frequency up to 150 MHz.
12 8Q tri_state Three-state output of flip-flop 8, high impedance when OE is high; IOH is limited to -32 mA and IOL to 64 mA at VCC = 3 V for the SN74LVT574.
13 7Q tri_state Three-state output of flip-flop 7, high impedance when OE is high; IOH is limited to -32 mA and IOL to 64 mA at VCC = 3 V for the SN74LVT574.
14 6Q tri_state Three-state output of flip-flop 6, high impedance when OE is high; IOH is limited to -32 mA and IOL to 64 mA at VCC = 3 V for the SN74LVT574.
15 5Q tri_state Three-state output of flip-flop 5, high impedance when OE is high; IOH is limited to -32 mA and IOL to 64 mA at VCC = 3 V for the SN74LVT574.
16 4Q tri_state Three-state output of flip-flop 4, high impedance when OE is high; IOH is limited to -32 mA and IOL to 64 mA at VCC = 3 V for the SN74LVT574.
17 3Q tri_state Three-state output of flip-flop 3, high impedance when OE is high; IOH is limited to -32 mA and IOL to 64 mA at VCC = 3 V for the SN74LVT574.
18 2Q tri_state Three-state output of flip-flop 2, high impedance when OE is high; IOH is limited to -32 mA and IOL to 64 mA at VCC = 3 V for the SN74LVT574.
19 1Q tri_state Three-state output of flip-flop 1, high impedance when OE is high; IOH is limited to -32 mA and IOL to 64 mA at VCC = 3 V for the SN74LVT574.
20 VCC power_in Positive supply, recommended range 2.7 V to 3.6 V for the SN74LVT574.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LVT574DWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74lvt574dwr-etched.step / sn74lvt574dwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvt574dwr.step / sn74lvt574dwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 5e2b403f93ab6a15, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF