component
SN74LVT125QPWRQ1
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LVT125QPWRQ1
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-14
SN74LVT125QPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output Enable input for buffer 1; when low, output follows input; when high, output is in high-impedance state. |
| 2 | 1A | input | Data input for buffer 1; includes bus-hold circuitry. |
| 3 | 1Y | tri_state | Three-state output for buffer 1; high-impedance state when 1OE is high. |
| 4 | 2OE | input | Output Enable input for buffer 2; when low, output follows input; when high, output is in high-impedance state. |
| 5 | 2A | input | Data input for buffer 2; includes bus-hold circuitry. |
| 6 | 2Y | tri_state | Three-state output for buffer 2; high-impedance state when 2OE is high. |
| 7 | GND | power_in | Ground reference. |
| 8 | 3Y | tri_state | Three-state output for buffer 3; high-impedance state when 3OE is high. |
| 9 | 3A | input | Data input for buffer 3; includes bus-hold circuitry. |
| 10 | 3OE | input | Output Enable input for buffer 3; when low, output follows input; when high, output is in high-impedance state. |
| 11 | 4Y | tri_state | Three-state output for buffer 4; high-impedance state when 4OE is high. |
| 12 | 4A | input | Data input for buffer 4; includes bus-hold circuitry. |
| 13 | 4OE | input | Output Enable input for buffer 4; when low, output follows input; when high, output is in high-impedance state. |
| 14 | VCC | power_in | Positive supply voltage; recommended operating range 2.7 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74LVT125QPWRQ1 - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74lvt125qpwrq1-etched.step/sn74lvt125qpwrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvt125qpwrq1.step/sn74lvt125qpwrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (16 pp, sha256
0734c7279d650a69, retrieved 2026-09-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).