component
SN74LVT125DR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LVT125DR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-14
SN74LVT125DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output-enable input for buffer 1; active low enables driver, high impedance when inactive. |
| 2 | 1A | input | Data input for buffer 1; bus-hold circuit maintains valid logic level without external pull resistors. |
| 3 | 1Y | tri_state | Tri-state output for buffer 1; driven when OE is low, high-impedance when OE is high. |
| 4 | 2OE | input | Output-enable input for buffer 2; active low enables driver, high impedance when inactive. |
| 5 | 2A | input | Data input for buffer 2; bus-hold circuit maintains valid logic level without external pull resistors. |
| 6 | 2Y | tri_state | Tri-state output for buffer 2; driven when OE is low, high-impedance when OE is high. |
| 7 | GND | power_in | Ground; negative power supply reference. |
| 8 | 3Y | tri_state | Tri-state output for buffer 3; driven when OE is low, high-impedance when OE is high. |
| 9 | 3A | input | Data input for buffer 3; bus-hold circuit maintains valid logic level without external pull resistors. |
| 10 | 3OE | input | Output-enable input for buffer 3; active low enables driver, high impedance when inactive. |
| 11 | 4Y | tri_state | Tri-state output for buffer 4; driven when OE is low, high-impedance when OE is high. |
| 12 | 4A | input | Data input for buffer 4; bus-hold circuit maintains valid logic level without external pull resistors. |
| 13 | 4OE | input | Output-enable input for buffer 4; active low enables driver, high impedance when inactive. |
| 14 | VCC | power_in | Positive power supply; 2.7 V to 3.6 V per recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74LVT125DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74lvt125dr-etched.step/sn74lvt125dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvt125dr.step/sn74lvt125dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
55cb78c6c938d1ab, retrieved 2026-09-24, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).