# SN74LVCZ244APWR

**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74LVCZ244APWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Bank 1 output enable, active low; VIH minimum 2 V and VIL maximum 0.8 V at VCC = 2.7 V to 3.6 V. |
| 2 | 1A1 | input | Bank 1 channel 1 data input; accepts 0 V to 5.5 V per the recommended operating input voltage range. |
| 3 | 2Y4 | output | Bank 2 channel 4 output; drives between 0 V and VCC in the high or low state, and 0 V to 5.5 V in 3-state. |
| 4 | 1A2 | input | Bank 1 channel 2 data input; accepts 0 V to 5.5 V per the recommended operating input voltage range. |
| 5 | 2Y3 | output | Bank 2 channel 3 output; drives between 0 V and VCC in the high or low state, and 0 V to 5.5 V in 3-state. |
| 6 | 1A3 | input | Bank 1 channel 3 data input; accepts 0 V to 5.5 V per the recommended operating input voltage range. |
| 7 | 2Y2 | output | Bank 2 channel 2 output; drives between 0 V and VCC in the high or low state, and 0 V to 5.5 V in 3-state. |
| 8 | 1A4 | input | Bank 1 channel 4 data input; accepts 0 V to 5.5 V per the recommended operating input voltage range. |
| 9 | 2Y1 | output | Bank 2 channel 1 output; drives between 0 V and VCC in the high or low state, and 0 V to 5.5 V in 3-state. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | 2A1 | input | Bank 2 channel 1 data input; accepts 0 V to 5.5 V per the recommended operating input voltage range. |
| 12 | 1Y4 | output | Bank 1 channel 4 output; drives between 0 V and VCC in the high or low state, and 0 V to 5.5 V in 3-state. |
| 13 | 2A2 | input | Bank 2 channel 2 data input; accepts 0 V to 5.5 V per the recommended operating input voltage range. |
| 14 | 1Y3 | output | Bank 1 channel 3 output; drives between 0 V and VCC in the high or low state, and 0 V to 5.5 V in 3-state. |
| 15 | 2A3 | input | Bank 2 channel 3 data input; accepts 0 V to 5.5 V per the recommended operating input voltage range. |
| 16 | 1Y2 | output | Bank 1 channel 2 output; drives between 0 V and VCC in the high or low state, and 0 V to 5.5 V in 3-state. |
| 17 | 2A4 | input | Bank 2 channel 4 data input; accepts 0 V to 5.5 V per the recommended operating input voltage range. |
| 18 | 1Y1 | output | Bank 1 channel 1 output; drives between 0 V and VCC in the high or low state, and 0 V to 5.5 V in 3-state. |
| 19 | 2OE | input | Bank 2 output enable, active low; VIH minimum 2 V and VIL maximum 0.8 V at VCC = 2.7 V to 3.6 V. |
| 20 | VCC | power_in | Positive supply; operates from 2.7 V to 3.6 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |

## CAD (KiCad official)

- Symbol: `SN74LVCZ244APWR`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `sn74lvcz244apwr-etched.step` / `sn74lvcz244apwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvcz244apwr.step` / `sn74lvcz244apwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74lvcz244a.pdf) (39 pp, sha256 `2eccccc56cdaa85d`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74lvcz244apwr-datasheet.pdf)