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SN74LVC827APWR

Public Made by Adom

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs sn74lvc827apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers sn74lvc827apwr: viewers · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Initial commit: component/sn74lvc827apwr · Ray 4d ago
sn74lvc827apwr-etched.fit.json sn74lvc827apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74lvc827apwr-etched.glb sn74lvc827apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74lvc827apwr-etched.step sn74lvc827apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74lvc827apwr.glb Publish 0.1.0 · Ray 4d ago
sn74lvc827apwr.kicad_mod Publish 0.1.0 · Ray 4d ago
sn74lvc827apwr.kicad_sym Publish 0.1.0 · Ray 4d ago
sn74lvc827apwr.lbr Publish 0.1.0 · Ray 4d ago
sn74lvc827apwr.step Publish 0.1.0 · Ray 4d ago

SN74LVC827APWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-24

SN74LVC827APWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-low output enable input; outputs are high-impedance when this pin is high
2 A1 input Data input A1
3 A2 input Data input A2
4 A3 input Data input A3
5 A4 input Data input A4
6 A5 input Data input A5
7 A6 input Data input A6
8 A7 input Data input A7
9 A8 input Data input A8
10 A9 input Data input A9
11 A10 input Data input A10
12 GND power_in Ground pin
13 OE2 input Active-low output enable input; outputs are high-impedance when this pin is high
14 Y10 tri_state 3-state data output; high-impedance when OE1 or OE2 is high
15 Y9 tri_state 3-state data output; high-impedance when OE1 or OE2 is high
16 Y8 tri_state 3-state data output; high-impedance when OE1 or OE2 is high
17 Y7 tri_state 3-state data output; high-impedance when OE1 or OE2 is high
18 Y6 tri_state 3-state data output; high-impedance when OE1 or OE2 is high
19 Y5 tri_state 3-state data output; high-impedance when OE1 or OE2 is high
20 Y4 tri_state 3-state data output; high-impedance when OE1 or OE2 is high
21 Y3 tri_state 3-state data output; high-impedance when OE1 or OE2 is high
22 Y2 tri_state 3-state data output; high-impedance when OE1 or OE2 is high
23 Y1 tri_state 3-state data output; high-impedance when OE1 or OE2 is high
24 VCC power_in Power supply pin; operates from 1.65V to 3.6V

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Logic
Pins 24

CAD (KiCad official)

  • Symbol: SN74LVC827APWR
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc827apwr-etched.step / sn74lvc827apwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc827apwr.step / sn74lvc827apwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 3cb300f26ce2223f, retrieved 2026-10-01, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF