component
SN74LVC646ADBR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SSOP-24-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
SN74LVC646ADBR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SSOP-24-150mil
SN74LVC646ADBR from Texas Instruments, in a SSOP-24-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLKAB | input | Clock input for the A-side registers; data on the A bus is stored on each low-to-high transition of CLKAB. |
| 2 | SAB | input | Select control for the A-to-B path that multiplexes stored and real-time (transparent) data. |
| 3 | DIR | input | Direction control that sets which bus receives data when OE is low (low selects B to A, high selects A to B). |
| 4 | A1 | bidirectional | A-bus port 1 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 5 | A2 | bidirectional | A-bus port 2 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 6 | A3 | bidirectional | A-bus port 3 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 7 | A4 | bidirectional | A-bus port 4 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 8 | A5 | bidirectional | A-bus port 5 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 9 | A6 | bidirectional | A-bus port 6 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 10 | A7 | bidirectional | A-bus port 7 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 11 | A8 | bidirectional | A-bus port 8 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 12 | GND | power_in | Ground reference; all unused inputs must be held at VCC or GND for proper device operation. |
| 13 | B8 | bidirectional | B-bus port 8 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 14 | B7 | bidirectional | B-bus port 7 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 15 | B6 | bidirectional | B-bus port 6 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 16 | B5 | bidirectional | B-bus port 5 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 17 | B4 | bidirectional | B-bus port 4 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 18 | B3 | bidirectional | B-bus port 3 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 19 | B2 | bidirectional | B-bus port 2 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 20 | B1 | bidirectional | B-bus port 1 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 21 | OE | input | Active-low output enable; OE high places the A and B outputs in the high-impedance (isolation) state, and it should be tied to VCC through a pullup resistor to keep outputs high-impedance during power up or down. |
| 22 | SBA | input | Select control for the B-to-A path that multiplexes stored and real-time (transparent) data. |
| 23 | CLKBA | input | Clock input for the B-side registers; data on the B bus is stored on each low-to-high transition of CLKBA. |
| 24 | VCC | power_in | Supply voltage; the SN74LVC646A is specified for 1.65 V to 3.6 V operation (operating range). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-24-150mil |
| Category | Logic |
| Pins | 24 |
CAD (KiCad official)
- Symbol:
SN74LVC646ADBR - Footprint:
Package_SO:SSOP-24_5.3x8.2mm_P0.65mm - 3D model: SSOP-24-150mil (KiCad packages3D, STEP)
- 3D model files:
sn74lvc646adbr-etched.step/sn74lvc646adbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvc646adbr.step/sn74lvc646adbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
979e7f444477033e, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74LVC646ADBR
**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SSOP-24-150mil
SN74LVC646ADBR from Texas Instruments, in a SSOP-24-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLKAB | input | Clock input for the A-side registers; data on the A bus is stored on each low-to-high transition of CLKAB. |
| 2 | SAB | input | Select control for the A-to-B path that multiplexes stored and real-time (transparent) data. |
| 3 | DIR | input | Direction control that sets which bus receives data when OE is low (low selects B to A, high selects A to B). |
| 4 | A1 | bidirectional | A-bus port 1 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 5 | A2 | bidirectional | A-bus port 2 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 6 | A3 | bidirectional | A-bus port 3 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 7 | A4 | bidirectional | A-bus port 4 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 8 | A5 | bidirectional | A-bus port 5 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 9 | A6 | bidirectional | A-bus port 6 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 10 | A7 | bidirectional | A-bus port 7 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 11 | A8 | bidirectional | A-bus port 8 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 12 | GND | power_in | Ground reference; all unused inputs must be held at VCC or GND for proper device operation. |
| 13 | B8 | bidirectional | B-bus port 8 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 14 | B7 | bidirectional | B-bus port 7 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 15 | B6 | bidirectional | B-bus port 6 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 16 | B5 | bidirectional | B-bus port 5 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 17 | B4 | bidirectional | B-bus port 4 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 18 | B3 | bidirectional | B-bus port 3 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 19 | B2 | bidirectional | B-bus port 2 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 20 | B1 | bidirectional | B-bus port 1 data input/output; the 3-state output is active only when OE is low and DIR selects it, and inputs accept up to 5.5 V. |
| 21 | OE | input | Active-low output enable; OE high places the A and B outputs in the high-impedance (isolation) state, and it should be tied to VCC through a pullup resistor to keep outputs high-impedance during power up or down. |
| 22 | SBA | input | Select control for the B-to-A path that multiplexes stored and real-time (transparent) data. |
| 23 | CLKBA | input | Clock input for the B-side registers; data on the B bus is stored on each low-to-high transition of CLKBA. |
| 24 | VCC | power_in | Supply voltage; the SN74LVC646A is specified for 1.65 V to 3.6 V operation (operating range). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-24-150mil |
| Category | Logic |
| Pins | 24 |
## CAD (KiCad official)
- Symbol: `SN74LVC646ADBR`
- Footprint: `Package_SO:SSOP-24_5.3x8.2mm_P0.65mm`
- 3D model: SSOP-24-150mil (KiCad packages3D, STEP)
- 3D model files: `sn74lvc646adbr-etched.step` / `sn74lvc646adbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvc646adbr.step` / `sn74lvc646adbr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74lvc646a) (21 pp, sha256 `979e7f444477033e`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74lvc646adbr-datasheet.pdf)