main
Ray sn74lvc574apwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b… 4ed72c8
{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74lvc574apwr",
  "title": "SN74LVC574APWR",
  "brief": "Texas Instruments Flip Flops, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "sn74lvc574apwr"
  ],
  "component": {
    "mpn": "SN74LVC574APWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Logic",
    "subcategory": "Flip Flops",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74lvc574a.pdf",
    "parts": {
      "symbol": "sn74lvc574apwr.kicad_sym",
      "footprint": "sn74lvc574apwr.kicad_mod",
      "model_3d": "sn74lvc574apwr-etched.glb",
      "model_3d_plain": "sn74lvc574apwr.glb",
      "model_3d_step": "sn74lvc574apwr-etched.step",
      "model_3d_step_plain": "sn74lvc574apwr.step",
      "lbr": "sn74lvc574apwr.lbr"
    },
    "distributor_links": {
      "digikey": "296-8532-2-ND",
      "lcsc": "C7672"
    },
    "pins": [
      {
        "number": "1",
        "name": "OE",
        "type": "input",
        "description": "Active-low output enable (OE). When low, the eight Q outputs are enabled; when high, all Q outputs are placed in the high-impedance (3-state) condition. Does not affect internal flip-flop operation. Tie to VCC through a pullup during power-up/down to guarantee Hi-Z."
      },
      {
        "number": "2",
        "name": "1D",
        "type": "input",
        "description": "Data input to flip-flop 1. Sampled on the rising edge of CLK and transferred to output 1Q. Inputs accept voltages up to 5.5 V."
      },
      {
        "number": "3",
        "name": "2D",
        "type": "input",
        "description": "Data input to flip-flop 2. Sampled on the rising edge of CLK and transferred to output 2Q."
      },
      {
        "number": "4",
        "name": "3D",
        "type": "input",
        "description": "Data input to flip-flop 3. Sampled on the rising edge of CLK and transferred to output 3Q."
      },
      {
        "number": "5",
        "name": "4D",
        "type": "input",
        "description": "Data input to flip-flop 4. Sampled on the rising edge of CLK and transferred to output 4Q."
      },
      {
        "number": "6",
        "name": "5D",
        "type": "input",
        "description": "Data input to flip-flop 5. Sampled on the rising edge of CLK and transferred to output 5Q."
      },
      {
        "number": "7",
        "name": "6D",
        "type": "input",
        "description": "Data input to flip-flop 6. Sampled on the rising edge of CLK and transferred to output 6Q."
      },
      {
        "number": "8",
        "name": "7D",
        "type": "input",
        "description": "Data input to flip-flop 7. Sampled on the rising edge of CLK and transferred to output 7Q."
      },
      {
        "number": "9",
        "name": "8D",
        "type": "input",
        "description": "Data input to flip-flop 8. Sampled on the rising edge of CLK and transferred to output 8Q."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V). Common return for VCC and all input/output signals."
      },
      {
        "number": "11",
        "name": "CLK",
        "type": "input",
        "description": "Clock input common to all eight flip-flops. Data on D inputs is transferred to Q outputs on the rising edge (positive transition) of CLK. Minimum pulse width 3.3 ns at VCC = 3.3 V; fmax up to 150 MHz."
      },
      {
        "number": "12",
        "name": "8Q",
        "type": "tri_state",
        "description": "3-state output of flip-flop 8. Reflects last clocked value of 8D when OE is low; Hi-Z when OE is high. Drive capability of ±24 mA at VCC = 3 V."
      },
      {
        "number": "13",
        "name": "7Q",
        "type": "tri_state",
        "description": "3-state output of flip-flop 7. Reflects last clocked value of 7D when OE is low; Hi-Z when OE is high."
      },
      {
        "number": "14",
        "name": "6Q",
        "type": "tri_state",
        "description": "3-state output of flip-flop 6. Reflects last clocked value of 6D when OE is low; Hi-Z when OE is high."
      },
      {
        "number": "15",
        "name": "5Q",
        "type": "tri_state",
        "description": "3-state output of flip-flop 5. Reflects last clocked value of 5D when OE is low; Hi-Z when OE is high."
      },
      {
        "number": "16",
        "name": "4Q",
        "type": "tri_state",
        "description": "3-state output of flip-flop 4. Reflects last clocked value of 4D when OE is low; Hi-Z when OE is high."
      },
      {
        "number": "17",
        "name": "3Q",
        "type": "tri_state",
        "description": "3-state output of flip-flop 3. Reflects last clocked value of 3D when OE is low; Hi-Z when OE is high."
      },
      {
        "number": "18",
        "name": "2Q",
        "type": "tri_state",
        "description": "3-state output of flip-flop 2. Reflects last clocked value of 2D when OE is low; Hi-Z when OE is high."
      },
      {
        "number": "19",
        "name": "1Q",
        "type": "tri_state",
        "description": "3-state output of flip-flop 1. Reflects last clocked value of 1D when OE is low; Hi-Z when OE is high."
      },
      {
        "number": "20",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage, 1.65 V to 3.6 V operating range (SN74LVC574A). Decouple with a local bypass capacitor to GND."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74lvc574a.pdf",
        "pages": 35,
        "sha256": "e6aad666cf80743a",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.8625,
        -2.925
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "TSSOP-20_4.4x6.5mm_P0.65mm@sha256:b7ca3a31dd45c122",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "74LVC574",
      "logic_family": "74LVC",
      "function_code": "574",
      "function_class": "Flip-Flop",
      "function_name": "Octal D Flip-Flop, 3-State",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74lvc574apwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74lvc574apwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "423764c940fc9950c1038103ca62b69cc22c1ac538d6a521e49bdae011c1f389",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-20",
      "Category": "Logic",
      "Pins": "20"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74lvc574apwr"
  ],
  "discovery_pitch": "SN74LVC574APWR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74lvc574apwr.kicad_sym",
    "sn74lvc574apwr.kicad_mod",
    "sn74lvc574apwr.glb",
    "sn74lvc574apwr.step",
    "sn74lvc574apwr-etched.step",
    "sn74lvc574apwr.lbr",
    "docs/hero.png",
    "docs/sn74lvc574apwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "SN74LVC574APWR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRAPWT",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRADW",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRADWR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRADBR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRADGVR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRANSR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRAN",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRARGYR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRAGQNR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRAZQNR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRFK",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRJ",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC574APWRW",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T07:49:12.736Z"
}