component
SN74LVC573AQDWRQ1
Public Made by Adomby adom
Texas Instruments Latches, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LVC573AQDWRQ1
Texas Instruments · Latches · SOIC-20-300mil
SN74LVC573AQDWRQ1 from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Buffered output-enable input (active low); when low, outputs follow latch state; when high, all outputs are high-impedance |
| 2 | 1D | input | Data input for latch 1; sampled when LE transitions from high to low |
| 3 | 2D | input | Data input for latch 2; sampled when LE transitions from high to low |
| 4 | 3D | input | Data input for latch 3; sampled when LE transitions from high to low |
| 5 | 4D | input | Data input for latch 4; sampled when LE transitions from high to low |
| 6 | 5D | input | Data input for latch 5; sampled when LE transitions from high to low |
| 7 | 6D | input | Data input for latch 6; sampled when LE transitions from high to low |
| 8 | 7D | input | Data input for latch 7; sampled when LE transitions from high to low |
| 9 | 8D | input | Data input for latch 8; sampled when LE transitions from high to low |
| 10 | GND | power_in | Ground; negative supply rail (0 V reference) |
| 11 | LE | input | Latch-enable input; when high, Q outputs follow D inputs; when low, Q outputs latch current D input state |
| 12 | 8Q | tri_state | 3-state output for latch 8; active high/low when OE=low, high-impedance when OE=high |
| 13 | 7Q | tri_state | 3-state output for latch 7; active high/low when OE=low, high-impedance when OE=high |
| 14 | 6Q | tri_state | 3-state output for latch 6; active high/low when OE=low, high-impedance when OE=high |
| 15 | 5Q | tri_state | 3-state output for latch 5; active high/low when OE=low, high-impedance when OE=high |
| 16 | 4Q | tri_state | 3-state output for latch 4; active high/low when OE=low, high-impedance when OE=high |
| 17 | 3Q | tri_state | 3-state output for latch 3; active high/low when OE=low, high-impedance when OE=high |
| 18 | 2Q | tri_state | 3-state output for latch 2; active high/low when OE=low, high-impedance when OE=high |
| 19 | 1Q | tri_state | 3-state output for latch 1; active high/low when OE=low, high-impedance when OE=high |
| 20 | VCC | power_in | Supply voltage; positive supply rail (2.7 V to 3.6 V operating range) |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74LVC573AQDWRQ1 - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
sn74lvc573aqdwrq1-etched.step/sn74lvc573aqdwrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvc573aqdwrq1.step/sn74lvc573aqdwrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (16 pp, sha256
3ca3e13f31964e35, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).