component
SN74LVC573APWR
Public Made by Adomby adom
Texas Instruments Latches, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
sn74lvc573apwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b…
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"title": "SN74LVC573APWR",
"brief": "Texas Instruments Latches, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
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"component": {
"mpn": "SN74LVC573APWR",
"manufacturer": "Texas Instruments",
"package": "TSSOP-20",
"pin_count": 20,
"category": "Logic",
"subcategory": "Latches",
"datasheet": "https://www.ti.com/lit/ds/symlink/sn74lvc573a.pdf",
"parts": {
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"footprint": "sn74lvc573apwr.kicad_mod",
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"model_3d_step": "sn74lvc573apwr-etched.step",
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"lbr": "sn74lvc573apwr.lbr"
},
"distributor_links": {
"digikey": "296-8529-2-ND",
"lcsc": "C113280"
},
"pins": [
{
"number": "1",
"name": "OE",
"type": "input",
"description": "Output-enable pin, active-low. When high, the eight Q outputs are placed in the high-impedance state; when low, the outputs are enabled to drive their stored/latched data."
},
{
"number": "2",
"name": "1D",
"type": "input",
"description": "D-type latch data input 1. Transparent to 1Q when LE is high; latched on the high-to-low transition of LE."
},
{
"number": "3",
"name": "2D",
"type": "input",
"description": "D-type latch data input 2. Transparent to 2Q when LE is high; latched on the high-to-low transition of LE."
},
{
"number": "4",
"name": "3D",
"type": "input",
"description": "D-type latch data input 3. Transparent to 3Q when LE is high; latched on the high-to-low transition of LE."
},
{
"number": "5",
"name": "4D",
"type": "input",
"description": "D-type latch data input 4. Transparent to 4Q when LE is high; latched on the high-to-low transition of LE."
},
{
"number": "6",
"name": "5D",
"type": "input",
"description": "D-type latch data input 5. Transparent to 5Q when LE is high; latched on the high-to-low transition of LE."
},
{
"number": "7",
"name": "6D",
"type": "input",
"description": "D-type latch data input 6. Transparent to 6Q when LE is high; latched on the high-to-low transition of LE."
},
{
"number": "8",
"name": "7D",
"type": "input",
"description": "D-type latch data input 7. Transparent to 7Q when LE is high; latched on the high-to-low transition of LE."
},
{
"number": "9",
"name": "8D",
"type": "input",
"description": "D-type latch data input 8. Transparent to 8Q when LE is high; latched on the high-to-low transition of LE."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Device ground reference (0 V). Continuous current through VCC or GND is limited to ±100 mA."
},
{
"number": "11",
"name": "LE",
"type": "input",
"description": "Latch enable input. When high, the eight latches are transparent (Q follows D); on the high-to-low transition, data present at the D inputs is stored in the latches."
},
{
"number": "12",
"name": "8Q",
"type": "tri_state",
"description": "3-state latched data output 8. Drives 8D data when OE is low; high-impedance when OE is high. IOL/IOH up to ±24 mA at VCC = 3 V."
},
{
"number": "13",
"name": "7Q",
"type": "tri_state",
"description": "3-state latched data output 7. Drives 7D data when OE is low; high-impedance when OE is high."
},
{
"number": "14",
"name": "6Q",
"type": "tri_state",
"description": "3-state latched data output 6. Drives 6D data when OE is low; high-impedance when OE is high."
},
{
"number": "15",
"name": "5Q",
"type": "tri_state",
"description": "3-state latched data output 5. Drives 5D data when OE is low; high-impedance when OE is high."
},
{
"number": "16",
"name": "4Q",
"type": "tri_state",
"description": "3-state latched data output 4. Drives 4D data when OE is low; high-impedance when OE is high."
},
{
"number": "17",
"name": "3Q",
"type": "tri_state",
"description": "3-state latched data output 3. Drives 3D data when OE is low; high-impedance when OE is high."
},
{
"number": "18",
"name": "2Q",
"type": "tri_state",
"description": "3-state latched data output 2. Drives 2D data when OE is low; high-impedance when OE is high."
},
{
"number": "19",
"name": "1Q",
"type": "tri_state",
"description": "3-state latched data output 1. Drives 1D data when OE is low; high-impedance when OE is high."
},
{
"number": "20",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage. Operating range 1.65 V to 3.6 V for SN74LVC573A; inputs accept up to 5.5 V for level-translation applications. Decouple locally with a 0.1 µF ceramic."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/sn74lvc573a.pdf",
"pages": 38,
"sha256": "1d245c329ee342b0",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.8625,
-2.925
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "TSSOP-20_4.4x6.5mm_P0.65mm@sha256:b7ca3a31dd45c122",
"mark": "drawn"
},
"logic": {
"family_id": "74LVC573",
"logic_family": "74LVC",
"function_code": "573",
"function_class": "Latch",
"function_name": "Octal D Latch with 3-State Outputs",
"manufacturer": "Texas Instruments",
"is_specialty": false
},
"models_3d": [
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"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "sn74lvc573apwr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"footprint_binding": "identity",
"sha256": "52552dc7086db42812d9eca20fc876094bc66eda90faa92b6db1ebf42381e7dd",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "TSSOP-20",
"Category": "Logic",
"Pins": "20"
}
},
"sections": [
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"readme",
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"discovery_triggers": [
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],
"discovery_pitch": "SN74LVC573APWR (Texas Instruments) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
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"sn74lvc573apwr.step",
"sn74lvc573apwr.lbr",
"docs/hero.png",
"docs/sn74lvc573apwr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"sn74lvc573apwr-etched.step"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "SN74LVC573APWR",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRDW",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRDWR",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRDB",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRDBR",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRDGV",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRDGVR",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRN",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRNS",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRNSR",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRRGY",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRRGYR",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRFK",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRGQN",
"kind": "packaging"
},
{
"mpn": "SN74LVC573APWRZQN",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T07:48:56.100Z"
}