Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

SN74LVC541ADWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

SN74LVC541ADWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output Enable 1 (active low), must be low with OE2 for outputs to be active.
2 A1 input Channel 1 input, 0V to 5.5V range with supply-dependent VIH and VIL thresholds.
3 A2 input Channel 2 input, 0V to 5.5V range with supply-dependent VIH and VIL thresholds.
4 A3 input Channel 3 input, 0V to 5.5V range with supply-dependent VIH and VIL thresholds.
5 A4 input Channel 4 input, 0V to 5.5V range with supply-dependent VIH and VIL thresholds.
6 A5 input Channel 5 input, 0V to 5.5V range with supply-dependent VIH and VIL thresholds.
7 A6 input Channel 6 input, 0V to 5.5V range with supply-dependent VIH and VIL thresholds.
8 A7 input Channel 7 input, 0V to 5.5V range with supply-dependent VIH and VIL thresholds.
9 A8 input Channel 8 input, 0V to 5.5V range with supply-dependent VIH and VIL thresholds.
10 GND power_in Ground connection.
11 Y8 tri_state Channel 8 tri-state output, driven 0V to VCC or high-impedance based on OE pins.
12 Y7 tri_state Channel 7 tri-state output, driven 0V to VCC or high-impedance based on OE pins.
13 Y6 tri_state Channel 6 tri-state output, driven 0V to VCC or high-impedance based on OE pins.
14 Y5 tri_state Channel 5 tri-state output, driven 0V to VCC or high-impedance based on OE pins.
15 Y4 tri_state Channel 4 tri-state output, driven 0V to VCC or high-impedance based on OE pins.
16 Y3 tri_state Channel 3 tri-state output, driven 0V to VCC or high-impedance based on OE pins.
17 Y2 tri_state Channel 2 tri-state output, driven 0V to VCC or high-impedance based on OE pins.
18 Y1 tri_state Channel 1 tri-state output, driven 0V to VCC or high-impedance based on OE pins.
19 OE2 input Output Enable 2 (active low), must be low with OE1 for outputs to be active.
20 VCC power_in Positive power supply, 1.65V to 3.6V recommended operating range.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LVC541ADWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74lvc541adwr-etched.step / sn74lvc541adwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc541adwr.step / sn74lvc541adwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (44 pp, sha256 dc44823f43e3a745, retrieved 2026-09-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF