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SN74LVC540APWT

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74LVC540APWT from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output Enable 1 (active low) that enables outputs when low with OE2 low and disables to high impedance when high.
2 A1 input Channel 1 input accepting input voltage from 0V to 5.5V.
3 A2 input Channel 2 input accepting input voltage from 0V to 5.5V.
4 A3 input Channel 3 input accepting input voltage from 0V to 5.5V.
5 A4 input Channel 4 input accepting input voltage from 0V to 5.5V.
6 A5 input Channel 5 input accepting input voltage from 0V to 5.5V.
7 A6 input Channel 6 input accepting input voltage from 0V to 5.5V.
8 A7 input Channel 7 input accepting input voltage from 0V to 5.5V.
9 A8 input Channel 8 input accepting input voltage from 0V to 5.5V.
10 GND power_in Ground providing reference voltage for the device.
11 Y8 tri_state Channel 8 inverted tri-state output with ±4 to ±24mA current capability depending on supply voltage.
12 Y7 tri_state Channel 7 inverted tri-state output with ±4 to ±24mA current capability depending on supply voltage.
13 Y6 tri_state Channel 6 inverted tri-state output with ±4 to ±24mA current capability depending on supply voltage.
14 Y5 tri_state Channel 5 inverted tri-state output with ±4 to ±24mA current capability depending on supply voltage.
15 Y4 tri_state Channel 4 inverted tri-state output with ±4 to ±24mA current capability depending on supply voltage.
16 Y3 tri_state Channel 3 inverted tri-state output with ±4 to ±24mA current capability depending on supply voltage.
17 Y2 tri_state Channel 2 inverted tri-state output with ±4 to ±24mA current capability depending on supply voltage.
18 Y1 tri_state Channel 1 inverted tri-state output with ±4 to ±24mA current capability depending on supply voltage.
19 OE2 input Output Enable 2 (active low) that enables outputs when low with OE1 low and disables to high impedance when high.
20 VCC power_in Positive power supply requiring 1.65V to 3.6V operating voltage.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LVC540APWT
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc540apwt-etched.step / sn74lvc540apwt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc540apwt.step / sn74lvc540apwt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (41 pp, sha256 c6e028cbd21e8c7e, retrieved 2026-10-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF