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SN74LVC540ADBR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LVC540ADBR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SSOP-20-208mil
SN74LVC540ADBR from Texas Instruments, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Output Enable 1 (active-low); when low with OE2 low, enables all outputs |
| 2 | A1 | input | Channel 1 input |
| 3 | A2 | input | Channel 2 input |
| 4 | A3 | input | Channel 3 input |
| 5 | A4 | input | Channel 4 input |
| 6 | A5 | input | Channel 5 input |
| 7 | A6 | input | Channel 6 input |
| 8 | A7 | input | Channel 7 input |
| 9 | A8 | input | Channel 8 input |
| 10 | GND | power_in | Ground |
| 11 | Y8 | tri_state | Channel 8 inverted output with tri-state control; high-impedance when OE1 or OE2 is high |
| 12 | Y7 | tri_state | Channel 7 inverted output with tri-state control; high-impedance when OE1 or OE2 is high |
| 13 | Y6 | tri_state | Channel 6 inverted output with tri-state control; high-impedance when OE1 or OE2 is high |
| 14 | Y5 | tri_state | Channel 5 inverted output with tri-state control; high-impedance when OE1 or OE2 is high |
| 15 | Y4 | tri_state | Channel 4 inverted output with tri-state control; high-impedance when OE1 or OE2 is high |
| 16 | Y3 | tri_state | Channel 3 inverted output with tri-state control; high-impedance when OE1 or OE2 is high |
| 17 | Y2 | tri_state | Channel 2 inverted output with tri-state control; high-impedance when OE1 or OE2 is high |
| 18 | Y1 | tri_state | Channel 1 inverted output with tri-state control; high-impedance when OE1 or OE2 is high |
| 19 | OE2 | input | Output Enable 2 (active-low); when low with OE1 low, enables all outputs |
| 20 | VCC | power_in | Positive power supply; recommended operating range 1.65V to 3.6V |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-20-208mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74LVC540ADBR - Footprint:
Package_SO:SSOP-20_5.3x7.2mm_P0.65mm - 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74lvc540adbr-etched.step/sn74lvc540adbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvc540adbr.step/sn74lvc540adbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (41 pp, sha256
5eb81dcb41174d4a, retrieved 2026-10-03, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).