component

SN74LVC4245APWR

Public Made by Adom

by adom

Texas Instruments Buffer/Driver/Transceiver, TSSOP-24. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74lvc4245apwr
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs sn74lvc4245apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json sn74lvc4245apwr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md sn74lvc4245apwr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sn74lvc4245apwr-etched.fit.json sn74lvc4245apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74lvc4245apwr-etched.glb sn74lvc4245apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74lvc4245apwr-etched.step sn74lvc4245apwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74lvc4245apwr.glb Publish 0.1.0 · Ray
sn74lvc4245apwr.kicad_mod Publish 0.1.0 · Ray
sn74lvc4245apwr.kicad_sym Publish 0.1.0 · Ray
sn74lvc4245apwr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sn74lvc4245apwr.step Publish 0.1.0 · Ray

SN74LVC4245APWR

Texas Instruments · Buffer/Driver/Transceiver · TSSOP-24

SN74LVC4245APWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCCA power_in Power supply for A side. Recommended 4.5V to 5.5V; absolute max 6.5V. Bypass with 100nF close to the pin.
2 DIR input Direction control input, referenced to VCCA. DIR=H drives A→B; DIR=L drives B→A. VIH≥2V, VIL≤0.8V.
3 A1 bidirectional A-port transceiver I/O bit 1, referenced to VCCA. Drives ±24mA at 5V VCCA; input tolerant to VCCA+0.5V.
4 A2 bidirectional A-port transceiver I/O bit 2, referenced to VCCA.
5 A3 bidirectional A-port transceiver I/O bit 3, referenced to VCCA.
6 A4 bidirectional A-port transceiver I/O bit 4, referenced to VCCA.
7 A5 bidirectional A-port transceiver I/O bit 5, referenced to VCCA.
8 A6 bidirectional A-port transceiver I/O bit 6, referenced to VCCA.
9 A7 bidirectional A-port transceiver I/O bit 7, referenced to VCCA.
10 A8 bidirectional A-port transceiver I/O bit 8, referenced to VCCA.
11 GND power_in Device ground. Tie all GND pins (11, 12, 13) to a common low-impedance ground plane.
12 GND power_in Device ground.
13 GND power_in Device ground.
14 B8 bidirectional B-port transceiver I/O bit 8, referenced to VCCB. Drives ±24mA at VCCB=3V; input tolerant to VCCB+0.5V.
15 B7 bidirectional B-port transceiver I/O bit 7, referenced to VCCB.
16 B6 bidirectional B-port transceiver I/O bit 6, referenced to VCCB.
17 B5 bidirectional B-port transceiver I/O bit 5, referenced to VCCB.
18 B4 bidirectional B-port transceiver I/O bit 4, referenced to VCCB.
19 B3 bidirectional B-port transceiver I/O bit 3, referenced to VCCB.
20 B2 bidirectional B-port transceiver I/O bit 2, referenced to VCCB.
21 B1 bidirectional B-port transceiver I/O bit 1, referenced to VCCB.
22 OE input Active-low output-enable input, referenced to VCCA. OE=L enables the transceiver outputs; OE=H places both A- and B-port I/Os in high-impedance.
23 VCCB power_in Power supply for B side. Pin diagram shows 'NC,VCCB' - Pin Functions table lists this pin as VCCB (2.7V to 3.6V recommended); it may be left NC only if pin 24 is used as the sole VCCB tie.
24 VCCB power_in Power supply for B side. Recommended 2.7V to 3.6V; absolute max 4.6V. Bypass with 100nF close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Logic
Pins 24

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC4245APWR
  • SN74LVC4245APWRDB
  • SN74LVC4245APWRDBR
  • SN74LVC4245APWRDW
  • SN74LVC4245APWRDWR

CAD (KiCad official)

  • Symbol: SN74LVC4245APWR
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc4245apwr-etched.step / sn74lvc4245apwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc4245apwr.step / sn74lvc4245apwr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sn74lvc4245apwr.step 315 KB You want the bare part, or you mark your own boards.
sn74lvc4245apwr-etched.step 3.3 MB You want the part with SN74LVC4245APWR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 838 faces against 387 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 29a63cd196f43f2b, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF