component

SN74LVC373AQPWREP

Public Made by Adom

by adom

Texas Instruments Latches, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74lvc373aqpwrepfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SN74LVC373AQPWREP

Texas Instruments · Latches · TSSOP-20

SN74LVC373AQPWREP from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low buffered output enable; when high, all eight outputs are forced to the high-impedance state, and OE should be tied to VCC through a pullup resistor to keep the outputs high-impedance during power up or power down.
2 1Q tri_state Latch output 1 follows 1D while LE is high and holds the latched level when LE goes low, with 3-state drive of up to 24 mA at VCC = 3 V.
3 1D input Data input for latch 1, which may be driven from 3.3-V or 5-V devices since inputs accept voltages up to 5.5 V.
4 2D input Data input for latch 2, which may be driven from 3.3-V or 5-V devices since inputs accept voltages up to 5.5 V.
5 2Q tri_state Latch output 2 follows 2D while LE is high and holds the latched level when LE goes low, with 3-state drive of up to 24 mA at VCC = 3 V.
6 3Q tri_state Latch output 3 follows 3D while LE is high and holds the latched level when LE goes low, with 3-state drive of up to 24 mA at VCC = 3 V.
7 3D input Data input for latch 3, which may be driven from 3.3-V or 5-V devices since inputs accept voltages up to 5.5 V.
8 4D input Data input for latch 4, which may be driven from 3.3-V or 5-V devices since inputs accept voltages up to 5.5 V.
9 4Q tri_state Latch output 4 follows 4D while LE is high and holds the latched level when LE goes low, with 3-state drive of up to 24 mA at VCC = 3 V.
10 GND power_in Ground reference for the device.
11 LE input Latch enable; while high the Q outputs follow D, and when taken low the Q outputs latch the levels present at D (data setup of 2 ns and hold of 2 ns before/after LE falls).
12 5Q tri_state Latch output 5 follows 5D while LE is high and holds the latched level when LE goes low, with 3-state drive of up to 24 mA at VCC = 3 V.
13 5D input Data input for latch 5, which may be driven from 3.3-V or 5-V devices since inputs accept voltages up to 5.5 V.
14 6D input Data input for latch 6, which may be driven from 3.3-V or 5-V devices since inputs accept voltages up to 5.5 V.
15 6Q tri_state Latch output 6 follows 6D while LE is high and holds the latched level when LE goes low, with 3-state drive of up to 24 mA at VCC = 3 V.
16 7Q tri_state Latch output 7 follows 7D while LE is high and holds the latched level when LE goes low, with 3-state drive of up to 24 mA at VCC = 3 V.
17 7D input Data input for latch 7, which may be driven from 3.3-V or 5-V devices since inputs accept voltages up to 5.5 V.
18 8D input Data input for latch 8, which may be driven from 3.3-V or 5-V devices since inputs accept voltages up to 5.5 V.
19 8Q tri_state Latch output 8 follows 8D while LE is high and holds the latched level when LE goes low, with 3-state drive of up to 24 mA at VCC = 3 V.
20 VCC power_in Supply voltage, specified for operation from 2 V to 3.6 V (data retention down to 1.5 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LVC373AQPWREP
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc373aqpwrep-etched.step / sn74lvc373aqpwrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc373aqpwrep.step / sn74lvc373aqpwrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (16 pp, sha256 aa38e6da9d88d479, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF