main
Ray sn74lvc32adr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) f3ab21c 13h ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74lvc32adr",
  "title": "SN74LVC32ADR",
  "brief": "Texas Instruments Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "sn74lvc32adr"
  ],
  "component": {
    "mpn": "SN74LVC32ADR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Gates",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74lvc32a.pdf",
    "parts": {
      "symbol": "sn74lvc32adr.kicad_sym",
      "footprint": "sn74lvc32adr.kicad_mod",
      "model_3d": "sn74lvc32adr-etched.glb",
      "model_3d_plain": "sn74lvc32adr.glb",
      "model_3d_step": "sn74lvc32adr-etched.step",
      "model_3d_step_plain": "sn74lvc32adr.step",
      "lbr": "sn74lvc32adr.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Gate 1 input A. CMOS logic input, 5.5 V tolerant regardless of VCC (1.65 V to 3.6 V operation)."
      },
      {
        "number": "2",
        "name": "1B",
        "type": "input",
        "description": "Gate 1 input B. CMOS logic input, 5.5 V tolerant regardless of VCC."
      },
      {
        "number": "3",
        "name": "1Y",
        "type": "output",
        "description": "Gate 1 output. Y = A + B (positive-logic OR). Drives up to ±24 mA at VCC = 3 V."
      },
      {
        "number": "4",
        "name": "2A",
        "type": "input",
        "description": "Gate 2 input A. CMOS logic input, 5.5 V tolerant."
      },
      {
        "number": "5",
        "name": "2B",
        "type": "input",
        "description": "Gate 2 input B. CMOS logic input, 5.5 V tolerant."
      },
      {
        "number": "6",
        "name": "2Y",
        "type": "output",
        "description": "Gate 2 output. Y = A + B. Drives up to ±24 mA at VCC = 3 V."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference pin (0 V)."
      },
      {
        "number": "8",
        "name": "3Y",
        "type": "output",
        "description": "Gate 3 output. Y = A + B. Drives up to ±24 mA at VCC = 3 V."
      },
      {
        "number": "9",
        "name": "3A",
        "type": "input",
        "description": "Gate 3 input A. CMOS logic input, 5.5 V tolerant."
      },
      {
        "number": "10",
        "name": "3B",
        "type": "input",
        "description": "Gate 3 input B. CMOS logic input, 5.5 V tolerant."
      },
      {
        "number": "11",
        "name": "4Y",
        "type": "output",
        "description": "Gate 4 output. Y = A + B. Drives up to ±24 mA at VCC = 3 V."
      },
      {
        "number": "12",
        "name": "4A",
        "type": "input",
        "description": "Gate 4 input A. CMOS logic input, 5.5 V tolerant."
      },
      {
        "number": "13",
        "name": "4B",
        "type": "input",
        "description": "Gate 4 input B. CMOS logic input, 5.5 V tolerant."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply pin. Operating range 1.65 V to 3.6 V. Bypass with a 0.1 µF ceramic capacitor close to the pin."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74lvc32a.pdf",
        "pages": 44,
        "sha256": "c12cc44afe95c856",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74LVC32",
      "logic_family": "74LVC",
      "function_code": "32",
      "function_class": "Gate",
      "function_name": "Quad 2-Input OR Gate",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74lvc32adr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74lvc32adr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4acab7820de695d8558d2675b2a3ceedec8287dd766b6e6c4f868194b3ab7ee8",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOIC-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74lvc32adr"
  ],
  "discovery_pitch": "SN74LVC32ADR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74lvc32adr.kicad_sym",
    "sn74lvc32adr.kicad_mod",
    "sn74lvc32adr.glb",
    "sn74lvc32adr.step",
    "sn74lvc32adr-etched.step",
    "sn74lvc32adr.lbr",
    "docs/hero.png",
    "docs/sn74lvc32adr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "SN74LVC32ADR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC32ADRD",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC32ADRDB",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC32ADRNS",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC32ADRPW",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC32ADRRGY",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC32ADRBQA",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC32ADRJ",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC32ADRW",
      "kind": "packaging"
    },
    {
      "mpn": "SN74LVC32ADRFK",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T07:46:44.084Z"
}