# SN74LVC32ADR

**Texas Instruments** · Gates · SOIC-14

SN74LVC32ADR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 input A. CMOS logic input, 5.5 V tolerant regardless of VCC (1.65 V to 3.6 V operation). |
| 2 | 1B | input | Gate 1 input B. CMOS logic input, 5.5 V tolerant regardless of VCC. |
| 3 | 1Y | output | Gate 1 output. Y = A + B (positive-logic OR). Drives up to ±24 mA at VCC = 3 V. |
| 4 | 2A | input | Gate 2 input A. CMOS logic input, 5.5 V tolerant. |
| 5 | 2B | input | Gate 2 input B. CMOS logic input, 5.5 V tolerant. |
| 6 | 2Y | output | Gate 2 output. Y = A + B. Drives up to ±24 mA at VCC = 3 V. |
| 7 | GND | power_in | Ground reference pin (0 V). |
| 8 | 3Y | output | Gate 3 output. Y = A + B. Drives up to ±24 mA at VCC = 3 V. |
| 9 | 3A | input | Gate 3 input A. CMOS logic input, 5.5 V tolerant. |
| 10 | 3B | input | Gate 3 input B. CMOS logic input, 5.5 V tolerant. |
| 11 | 4Y | output | Gate 4 output. Y = A + B. Drives up to ±24 mA at VCC = 3 V. |
| 12 | 4A | input | Gate 4 input A. CMOS logic input, 5.5 V tolerant. |
| 13 | 4B | input | Gate 4 input B. CMOS logic input, 5.5 V tolerant. |
| 14 | VCC | power_in | Positive supply pin. Operating range 1.65 V to 3.6 V. Bypass with a 0.1 µF ceramic capacitor close to the pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |

## Ordering variants

Same part, different packaging or reel option.

- `SN74LVC32ADR`
- `SN74LVC32ADRD`
- `SN74LVC32ADRDB`
- `SN74LVC32ADRNS`
- `SN74LVC32ADRPW`
- `SN74LVC32ADRRGY`
- `SN74LVC32ADRBQA`
- `SN74LVC32ADRJ`
- `SN74LVC32ADRW`
- `SN74LVC32ADRFK`

## CAD (KiCad official)

- Symbol: `SN74LVC32ADR`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `sn74lvc32adr-etched.step` / `sn74lvc32adr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvc32adr.step` / `sn74lvc32adr.glb` are the bare package body.

## 3D model downloads

Two STEP files. Same geometry, different body top:

| File | Size | Use it when |
|---|---|---|
| [`sn74lvc32adr.step`](sn74lvc32adr.step) | 195 KB | You want the bare part, or you mark your own boards. |
| [`sn74lvc32adr-etched.step`](sn74lvc32adr-etched.step) | 2.5 MB | You want the part with `SN74LVC32ADR` already on it. |

The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 625 faces against 237 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74lvc32a.pdf) (44 pp, sha256 `c12cc44afe95c856`, retrieved 2026-08-17, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74lvc32adr-datasheet.pdf)