# SN74LVC2G74DCUR

**Texas Instruments** · Flip Flops · VSSOP-8

SN74LVC2G74DCUR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLK | input | Clock input. Data at D is transferred to Q on the positive-going edge of CLK when PRE and CLR are inactive (high). Accepts input voltages up to 5.5 V regardless of VCC. |
| 2 | D | input | Data input. Sampled on the rising edge of CLK and transferred to Q when PRE and CLR are inactive high. Input tolerant to 5.5 V. |
| 3 | ~{Q} | output | Complementary (inverted) flip-flop output. Drives ±24 mA at VCC = 3.3 V. Goes high when the internal Q latch is reset by CLR = L. |
| 4 | GND | power_in | Ground reference (0 V) for the device. |
| 5 | Q | output | True flip-flop output. Reflects the state of the D input following the rising edge of CLK. Drives ±24 mA at VCC = 3.3 V. |
| 6 | ~{CLR} | input | Active-low asynchronous clear input. A low level forces Q low regardless of CLK or D. Must be held high for normal clocked operation. |
| 7 | ~{PRE} | input | Active-low asynchronous preset input. A low level forces Q high regardless of CLK or D. Must be held high for normal clocked operation. |
| 8 | VCC | power_in | Positive supply voltage. Operating range 1.65 V to 5.5 V; data retention down to 1.5 V. Bypass locally with a 0.1 µF ceramic capacitor to GND. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | Logic |
| Pins | 8 |

## Ordering variants

Same part, different packaging or reel option.

- `SN74LVC2G74DCUR`
- `SN74LVC2G74DCURDCUT`
- `SN74LVC2G74DCURDCTR`
- `SN74LVC2G74DCURDCTT`
- `SN74LVC2G74DCURYZPR`

## CAD (KiCad official)

- Symbol: `SN74LVC2G74DCUR`
- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`
- 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `sn74lvc2g74dcur-etched.step` / `sn74lvc2g74dcur-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvc2g74dcur.step` / `sn74lvc2g74dcur.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74lvc2g74dcur.pdf) (18 pp, sha256 `5bb76431d38ce5ae`, retrieved 2026-08-17, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74lvc2g74dcur-datasheet.pdf)