component

SN74LVC2G14DBVR

Public Made by Adom

by adom

UMW Inverters, SOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs sn74lvc2g14dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json sn74lvc2g14dbvr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md sn74lvc2g14dbvr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sn74lvc2g14dbvr-etched.fit.json sn74lvc2g14dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74lvc2g14dbvr-etched.glb sn74lvc2g14dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74lvc2g14dbvr-etched.step sn74lvc2g14dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74lvc2g14dbvr.glb Publish 0.1.0 · Ray
sn74lvc2g14dbvr.kicad_mod Publish 0.1.0 · Ray
sn74lvc2g14dbvr.kicad_sym Publish 0.1.0 · Ray
sn74lvc2g14dbvr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sn74lvc2g14dbvr.step Publish 0.1.0 · Ray

SN74LVC2G14DBVR

UMW · Inverters · SOT-23-6

SN74LVC2G14DBVR from UMW, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INA1 input Schmitt-trigger input to inverter A1. Accepts 0 V to 5.5 V regardless of VCC (over-voltage tolerant). Hysteresis 0.3 V to 1.4 V depending on VCC.
2 GND power_in Ground reference (0 V) for the device. Must be tied to the system ground with a low-inductance path.
3 INA2 input Schmitt-trigger input to inverter A2. Accepts 0 V to 5.5 V regardless of VCC (over-voltage tolerant). Hysteresis 0.3 V to 1.4 V depending on VCC.
4 Y2 output Inverted CMOS push-pull output of channel 2 (Y2 = /INA2). Balanced 24 mA sink/source drive at VCC = 3 V.
5 VCC power_in Positive supply input, 1.65 V to 5.5 V operating range. Decouple with a 0.1 uF ceramic capacitor placed close to the pin.
6 Y1 output Inverted CMOS push-pull output of channel 1 (Y1 = /INA1). Balanced 24 mA sink/source drive at VCC = 3 V.

Key specifications

Parameter Value
Manufacturer UMW
Package SOT-23-6
Category Logic
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC2G14DBVR
  • SN74LVC2G14DBVRDCKR

CAD (KiCad official)

  • Symbol: SN74LVC2G14DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc2g14dbvr-etched.step / sn74lvc2g14dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc2g14dbvr.step / sn74lvc2g14dbvr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sn74lvc2g14dbvr.step 97 KB You want the bare part, or you mark your own boards.
sn74lvc2g14dbvr-etched.step 2.2 MB You want the part with SN74LVC2G14DBVR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 568 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (12 pp, sha256 80e6f9bba73df83b, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF