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SN74LVC2G14DB

Public Made by Adom

by adom

lingxingic Flip Flops, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LVC2G14DB

lingxingic · Flip Flops · SOT-23-6

SN74LVC2G14DB from lingxingic, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input for the first inverting Schmitt-trigger buffer; the datasheet states inputs are 5 V tolerant with an input voltage range of 0 V to 5.5 V.
2 GND power_in Ground reference (0 V); all voltages are referenced to this pin.
3 2A input Data input for the second inverting Schmitt-trigger buffer; the datasheet states inputs are 5 V tolerant with an input voltage range of 0 V to 5.5 V.
4 2Y output Data output of the second inverting buffer (logic inverse of 2A); the datasheet rates drive at ±24 mA at VCC = 3.0 V.
5 VCC power_in Supply voltage, specified from 1.65 V to 5.5 V in the recommended operating conditions.
6 1Y output Data output of the first inverting buffer (logic inverse of 1A); the datasheet rates drive at ±24 mA at VCC = 3.0 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOT-23-6
Category Logic
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 6.5 V 5
input voltage VI -0.5 6.5 V 5
output voltage VO -0.5 V Active mode; upper limit printed as VCC+0.5 V 5
output voltage VO -0.5 6.5 V Power-down mode; VCC=0V 5
input clamping current IIK -50 mA VI < 0V 5
output clamping current IOK -50 50 mA VO > VCC or VO < 0V 5
output current IO -50 50 mA VO=0V to VCC 5
supply current ICC 100 mA 5
ground current IGND -100 mA 5
storage temperature Tstg -65 150 ℃ 5
total power dissipation Ptot 250 mW 5
soldering temperature TL 260 ℃ 10s 5
supply voltage VCC 1.65 5.5 V 6
input voltage VI 0 5.5 V 6
output voltage VO 0 V Active mode; upper limit printed as VCC 6
output voltage VO 0 5.5 V Power-down mode; VCC=0V 6
ambient temperature Tamb -40 125 ℃ 6
HIGH-level output voltage VOH 0.95 V IO=-4mA; VCC=1.65V 7
HIGH-level output voltage VOH 1.7 V IO=-8mA; VCC=2.3V 7
HIGH-level output voltage VOH 1.9 V IO=-12mA; VCC=2.7V 7
HIGH-level output voltage VOH 2 V IO=-24mA; VCC=3.0V 7
HIGH-level output voltage VOH 3.4 V IO=-32mA; VCC=4.5V 7
LOW-level output voltage VOL 0.1 V VI = VT+ or VT-; IO=100uA; VCC=1.65V to 5.5V 7
LOW-level output voltage VOL 0.7 V IO=4mA; VCC=1.65V 7
LOW-level output voltage VOL 0.45 V IO=8mA; VCC=2.3V 7
LOW-level output voltage VOL 0.6 V IO=12mA; VCC=2.7V 7
LOW-level output voltage VOL 0.8 V IO=24mA; VCC=3.0V 7
input leakage current II -1 1 uA VI=5.5V or GND; VCC=0V to 5.5V 7
power-off leakage current IOFF -2 2 uA VI or VO=5.5V; VCC=0V 7
supply current ICC 4 uA VI=5.5V or GND; IO=0A; VCC=1.65V to 5.5V 7
additional supply current ΔICC 500 uA VI=VCC-0.6V; IO=0A; VCC=2.3V to 5.5V 7
nA to nY propagation delay (LOW-to-HIGH) tPLH 23 ns see Figure 5; VCC=1.65V to 1.95V 8
nA to nY propagation delay (LOW-to-HIGH) tPLH 17 ns see Figure 5; VCC=2.3V to 2.7V 8
nA to nY propagation delay (LOW-to-HIGH) tPLH 15.5 ns see Figure 5; VCC=2.7V 8
nA to nY propagation delay (LOW-to-HIGH) tPLH 14 ns see Figure 5; VCC=3.0V to 3.6V 8
nA to nY propagation delay (LOW-to-HIGH) tPLH 12.5 ns see Figure 5; VCC=4.5V to 5.5V 8
nA to nY propagation delay (HIGH-to-LOW) tPHL 20.8 ns see Figure 5; VCC=1.65V to 1.95V 8
nA to nY propagation delay (HIGH-to-LOW) tPHL 18.5 ns see Figure 5; VCC=2.3V to 2.7V 8
nA to nY propagation delay (HIGH-to-LOW) tPHL 17 ns see Figure 5; VCC=4.5V to 5.5V 8
positive-going threshold voltage VT+ 0.79 1.2 V VCC=1.8V; see Figure 6 and Figure 7 9
positive-going threshold voltage VT+ 1 1.45 V VCC=2.3V; see Figure 6 and Figure 7 9
positive-going threshold voltage VT+ 1.26 1.71 V VCC=3.0V; see Figure 6 and Figure 7 9
positive-going threshold voltage VT+ 1.81 2.41 V VCC=4.5V; see Figure 6 and Figure 7 9
positive-going threshold voltage VT+ 2.16 2.91 V VCC=5.5V; see Figure 6 and Figure 7 9
negative-going threshold voltage VT- 0.45 0.78 V VCC=1.8V; see Figure 6 and Figure 7 9
negative-going threshold voltage VT- 0.64 0.99 V VCC=2.3V; see Figure 6 and Figure 7 9
negative-going threshold voltage VT- 0.86 1.37 V VCC=3.0V; see Figure 6 and Figure 7 9
negative-going threshold voltage VT- 1.35 2.12 V VCC=4.5V; see Figure 6 and Figure 7 9
negative-going threshold voltage VT- 1.61 2.62 V VCC=5.5V; see Figure 6 and Figure 7 9
hysteresis voltage VH 0.4 V (VT+ - VT-); VCC=1.8V; see Figure 6 and Figure 7 9
hysteresis voltage VH 0.42 V (VT+ - VT-); VCC=3.0V; see Figure 6 and Figure 7 9
hysteresis voltage VH 0.45 V (VT+ - VT-); VCC=4.5V; see Figure 6 and Figure 7 9
hysteresis voltage VH 0.47 V (VT+ - VT-); VCC=5.5V; see Figure 6 and Figure 7 9
input capacitance CI 3.5 pF VCC=3.3V; VI=GND to VCC 6

CAD (KiCad official)

  • Symbol: SN74LVC2G14DB
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc2g14db-etched.step / sn74lvc2g14db-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc2g14db.step / sn74lvc2g14db.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (15 pp, sha256 a3ad73168a7fe64f, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF