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CAD + datasheet + .step

Ray ·89aee88b5f · ·parent a30ebfc
1 file changed +110−8
page.json+110−8
@@ -1,8 +1,11 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "sn74lvc2g14",+  "title": "SN74LVC2G14 Dual Schmitt Inverter",+  "brief": "Dual Schmitt-trigger inverter in a 6-pin package for cleaning up slow or noisy edges.",   "version": "0.1.0",-  "type": "component",-  "description": "Dual Schmitt-trigger inverter in a 6-pin package for cleaning up slow or noisy edges.",+  "license": "CC-BY-SA-4.0",   "tags": [     "logic",     "inverter",@@ -12,6 +15,110 @@     "ti",     "sot-23-6"   ],+  "component": {+    "mpn": "SN74LVC2G14",+    "manufacturer": "Texas Instruments",+    "package": "SOT-23-6",+    "pin_count": 6,+    "category": "Logic",+    "subcategory": "Logic Gate",+    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74lvc2g14.pdf",+    "parts": {+      "symbol": "sn74lvc2g14.kicad_sym",+      "footprint": "sn74lvc2g14.kicad_mod",+      "model_3d": "sn74lvc2g14.glb",+      "model_3d_step": "sn74lvc2g14.step"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "1A",+        "type": "input",+        "description": "Gate 1 Schmitt-trigger logic input. 5.5-V tolerant; positive-going threshold VT+ typ 1.7 V and negative-going threshold VT- typ 0.6 V at VCC = 3 V (hysteresis typ 1.1 V)."+      },+      {+        "number": "6",+        "name": "1Y",+        "type": "output",+        "description": "Gate 1 inverted output (Y = /A). Push-pull CMOS output, \u00b124 mA drive at VCC = 3 V, \u00b132 mA at VCC = 4.5 V."+      },+      {+        "number": "3",+        "name": "2A",+        "type": "input",+        "description": "Gate 2 Schmitt-trigger logic input. 5.5-V tolerant; same hysteresis characteristics as 1A."+      },+      {+        "number": "4",+        "name": "2Y",+        "type": "output",+        "description": "Gate 2 inverted output (Y = /A). Push-pull CMOS output, \u00b124 mA drive at VCC = 3 V."+      },+      {+        "number": "2",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V). Connect directly to the board ground plane."+      },+      {+        "number": "5",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage, 1.65 V to 5.5 V operating range. Bypass locally with a 0.1 \u00b5F ceramic capacitor to GND."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/sn74lvc2g14.pdf",+        "pages": 28,+        "sha256": "de3f4670541e131c",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 6,+        "described": 6,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Type": "Dual Schmitt-trigger inverter",+      "Logic family": "LVC (CMOS)",+      "Supply voltage": "1.65 V to 5.5 V",+      "Input hysteresis": "Schmitt-trigger",+      "Input tolerance": "5 V tolerant",+      "Propagation delay": "4.3 ns typ at 3.3 V",+      "Operating temperature": "-40 C to 125 C"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "Schmitt inverter",+    "dual inverter",+    "signal debounce",+    "clean up slow edges",+    "two-gate logic"+  ],+  "discovery_pitch": "Two Schmitt-trigger inverters in a tiny 6-pin package to square up slow or noisy edges right where you need them.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -28,10 +135,5 @@     "docs/sn74lvc2g14-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file