SN74LVC2G125DCT

{
  "slug": "sn74lvc2g125dct",
  "version": "0.1.0",
  "type": "component",
  "description": "lingxingic Buffers, Drivers, Receivers, Transceivers, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "sn74lvc2g125dct",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74lvc2g125dct.kicad_sym",
    "sn74lvc2g125dct.kicad_mod",
    "sn74lvc2g125dct.glb",
    "sn74lvc2g125dct.step",
    "sn74lvc2g125dct.lbr",
    "docs/hero.png",
    "docs/sn74lvc2g125dct-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sn74lvc2g125dct-hero.glb",
    "sn74lvc2g125dct-hero.overlay.json",
    "sn74lvc2g125dct-etched.glb"
  ],
  "component": {
    "mpn": "SN74LVC2G125DCT",
    "manufacturer": "lingxingic",
    "package": "TSSOP-8",
    "pin_count": 8,
    "category": "Logic",
    "subcategory": "Buffers, Drivers, Receivers, Transceivers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604442453260705792",
    "parts": {
      "symbol": "sn74lvc2g125dct.kicad_sym",
      "footprint": "sn74lvc2g125dct.kicad_mod",
      "model_3d": "sn74lvc2g125dct-hero.glb",
      "model_3d_plain": "sn74lvc2g125dct-etched.glb",
      "model_3d_step": "sn74lvc2g125dct-etched.step",
      "model_3d_step_plain": "sn74lvc2g125dct.step",
      "lbr": "sn74lvc2g125dct.lbr"
    },
    "distributor_links": {
      "lcsc": "C41413603"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T05:39:25Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "1OE",
        "type": "input",
        "description": "Active-low output enable for channel 1; when this input is high the 1Y output is forced to the high-impedance (Z) state."
      },
      {
        "number": "2",
        "name": "1A",
        "type": "input",
        "description": "Data input for channel 1; recommended input voltage range is 0 V to 5.5 V."
      },
      {
        "number": "3",
        "name": "2Y",
        "type": "tri_state",
        "description": "Non-inverting data output for channel 2, which goes to high-impedance when 2OE is high; absolute maximum output current is ±50 mA."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference pin at 0 V."
      },
      {
        "number": "5",
        "name": "2A",
        "type": "input",
        "description": "Data input for channel 2; recommended input voltage range is 0 V to 5.5 V."
      },
      {
        "number": "6",
        "name": "1Y",
        "type": "tri_state",
        "description": "Non-inverting data output for channel 1, which goes to high-impedance when 1OE is high; absolute maximum output current is ±50 mA."
      },
      {
        "number": "7",
        "name": "2OE",
        "type": "input",
        "description": "Active-low output enable for channel 2; when this input is high the 2Y output is forced to the high-impedance (Z) state."
      },
      {
        "number": "8",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage; recommended range is 1.65 V to 5.5 V, with absolute maximum rating of -0.5 V to +6.5 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The DCT ordering suffix is listed with the TSSOP8 package (3.0 x 3.0 mm, 0.65 mm pitch) on page 3, b; The pin layout drawing on page 4 is garbled in the text extraction. Pin numbers and names were taken; The pin layout and pin description table on page 4 are shared by the TSSOP8 and VSSOP8 variants; the"
        ],
        "pages_sent": 13,
        "cost_usd": 0.0577,
        "at": "2026-10-19T05:36:55"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604442453260705792",
        "pages": 13,
        "sha256": "2e9223a70cc92a07",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "file": "sn74lvc2g125dct.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.9,
          3.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "cf28a51742b2e31065e201d1b313207140cbfb49062efd938788f7a310d02738",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74lvc2g125dct-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.9,
          3.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f8127ad5e66bf7e0f85fa4361e28156a5aad86d2f733e7cc7feb2b3ff4a2242e",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}