component

SN74LVC2G02MDCUREP

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Texas Instruments Gates, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssn74lvc2g02mdcurepfactory-2.0.0extractor-text

Verified SN74LVC2G02MDCUREP

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN74LVC2G02MDCUREP · VSSOP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 11-page datasheet
  • ✓distributor: lcsc C2859978, digikey 296-23471-2-ND, mouser 595-74LVC2G02MDCUREP
  • ✓family: VSSOP-8_2.3x2mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-onxkeuo2/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.8)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn74lvc2g02mdcurep.kicad_sym✓ sn74lvc2g02mdcurep.kicad_mod✓ sn74lvc2g02mdcurep.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 4h ago
viewers sn74lvc2g02mdcurep: viewers · Ray 4h ago
package.json Publish 0.1.0 · Ray 4h ago
page.json Set visibility: public · Ray 4h ago
README.md Publish 0.1.0 · Ray 4h ago
sn74lvc2g02mdcurep-etched.glb Publish 0.1.0 · Ray 4h ago
sn74lvc2g02mdcurep-etched.step sn74lvc2g02mdcurep: factory component page (tier=mfr) · Ray 4h ago
sn74lvc2g02mdcurep-hero.glb sn74lvc2g02mdcurep: hero GLB from the etched model (keeps the MPN mark) · Ray 4h ago
sn74lvc2g02mdcurep-hero.overlay.json Publish 0.1.0 · Ray 4h ago
sn74lvc2g02mdcurep.glb Publish 0.1.0 · Ray 4h ago
sn74lvc2g02mdcurep.kicad_mod Publish 0.1.0 · Ray 4h ago
sn74lvc2g02mdcurep.kicad_sym Publish 0.1.0 · Ray 4h ago
sn74lvc2g02mdcurep.lbr Publish 0.1.0 · Ray 4h ago
sn74lvc2g02mdcurep.step Publish 0.1.0 · Ray 4h ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 4h ago

SN74LVC2G02MDCUREP

Texas Instruments · Gates · VSSOP-8

SN74LVC2G02MDCUREP from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input A of NOR gate 1, which accepts voltages up to 5.5 V.
2 1B input Input B of NOR gate 1, which accepts voltages up to 5.5 V.
3 2Y output Output of NOR gate 2, rated ±24 mA at 3.3 V, with Ioff circuitry that disables the output and prevents backflow when the device is powered down.
4 GND power_in Ground reference pin for the device.
5 2A input Input A of NOR gate 2, which accepts voltages up to 5.5 V.
6 2B input Input B of NOR gate 2, which accepts voltages up to 5.5 V.
7 1Y output Output of NOR gate 1, rated ±24 mA at 3.3 V, with Ioff circuitry that disables the output and prevents backflow when the device is powered down.
8 VCC power_in Supply voltage pin, operating range 1.65 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-8
Category Logic ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (operating) VCC 1.65 5.5 V Operating 3
Supply voltage (data retention only) VCC 1.5 V Data retention only 3
High-level input voltage VIH 1.7 V VCC = 2.3 V to 2.7 V 3
High-level input voltage VIH 2 V VCC = 3 V to 3.6 V 3
Low-level input voltage VIL 0.7 V VCC = 2.3 V to 2.7 V 3
Low-level input voltage VIL 0.8 V VCC = 3 V to 3.6 V 3
Input voltage VI 0 5.5 V 3
Output voltage (minimum) VO 0 V 3
High-level output current IOH -4 mA VCC = 1.65 V 3
High-level output current IOH -8 mA VCC = 2.3 V 3
High-level output current IOH -16 mA VCC = 3 V 3
High-level output current IOH -24 mA VCC = 3 V 3
Low-level output current IOL 4 mA VCC = 1.65 V 3
Low-level output current IOL 8 mA VCC = 2.3 V 3
Low-level output current IOL 16 mA VCC = 3 V 3
Low-level output current IOL 24 mA VCC = 3 V 3
Input transition rise or fall rate Δt/Δv 20 ns/V VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 3
Input transition rise or fall rate Δt/Δv 10 ns/V VCC = 3.3 V ± 0.3 V 3
Input transition rise or fall rate Δt/Δv 5 ns/V VCC = 5 V ± 0.5 V 3
Operating free-air temperature TA -55 125 °C 3
High-level output voltage VOH 1.2 V IOH = -4 mA, VCC = 1.65 V 4
High-level output voltage VOH 1.9 V IOH = -8 mA, VCC = 2.3 V 4
High-level output voltage VOH 2.4 V IOH = -16 mA, VCC = 3 V 4
High-level output voltage VOH 2.3 V IOH = -24 mA, VCC = 3 V 4
Low-level output voltage VOL 0.1 V IOL = 100 μA, VCC = 1.65 V to 5.5 V 4
Low-level output voltage VOL 0.45 V IOL = 4 mA, VCC = 1.65 V 4
Low-level output voltage VOL 0.3 V IOL = 8 mA, VCC = 2.3 V 4
Low-level output voltage VOL 0.4 V IOL = 16 mA, VCC = 3 V 4
Low-level output voltage VOL 0.55 V IOL = 24 mA, VCC = 3 V 4
Input leakage current II -5 5 μA A or B inputs, VI = 5.5 V or GND, VCC 0 to 5.5 V 4
Power-off leakage current Ioff -10 10 μA VI or VO = 5.5 V, VCC = 0 4
Quiescent supply current ICC 10 μA VI = 5.5 V or GND, IO = 0, VCC 1.65 V to 5.5 V 4
Additional quiescent supply current per input ΔICC 500 μA One input at VCC, 0.6 V, other inputs at VCC or GND, VCC 3 V to 5.5 V 4
Propagation delay A or B to Y tpd 1 5.9 ns VCC = 3.3 V ± 0.3 V, see Figure 1 4
Propagation delay A or B to Y tpd 1 5.4 ns VCC = 5 V ± 0.5 V, see Figure 1 4
Supply voltage VCC -0.5 6.5 V 2
Input voltage VI -0.5 6.5 V 2
Voltage applied to output in high-impedance or power-off state VO -0.5 6.5 V 2
Voltage applied to output in high or low state (minimum) VO -0.5 V 2
Input clamp current IIK -50 mA VI < 0 2
Output clamp current IOK -50 mA VO < 0 2
Continuous output current IO -50 50 mA 2
Continuous current through VCC or GND ICC -100 100 mA 2
Storage temperature range Tstg -65 150 °C 2
Package thermal impedance θJA 227 DCU package, calculated per JESD 51-7 2

CAD (KiCad official)

  • Symbol: SN74LVC2G02MDCUREP
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc2g02mdcurep-etched.step / sn74lvc2g02mdcurep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc2g02mdcurep.step / sn74lvc2g02mdcurep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (11 pp, sha256 fb63b494f53b95b6, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF