component
SN74LVC1G98IDCKREP
Public Made by Adomby adom
Texas Instruments Gates, SC-70-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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SN74LVC1G98IDCKREP
Texas Instruments · Gates · SC-70-6
SN74LVC1G98IDCKREP from Texas Instruments, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | In1 | input | Data input 1 of the configurable gate; inputs accept voltages to 5.5 V and must be held at VCC or GND if unused. |
| 2 | GND | power_in | Ground pin. |
| 3 | In0 | input | Data input 0 of the configurable gate; inputs accept voltages to 5.5 V and must be held at VCC or GND if unused. |
| 4 | Y | output | Gate output with ±24 mA drive at 3.3 V; the output state is set by the 3-bit pattern on In2, In1 and In0. |
| 5 | VCC | power_in | Supply voltage, 1.65 V to 5.5 V operating. |
| 6 | In2 | input | Data input 2 of the configurable gate; inputs accept voltages to 5.5 V and must be held at VCC or GND if unused. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SC-70-6 |
| Category | Logic ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Positive-going input threshold voltage | VT+ | 0.79 | 1.16 | V | VCC = 1.65 V | 5 | |
| Positive-going input threshold voltage | VT+ | 1.11 | 1.56 | V | VCC = 2.3 V | 5 | |
| Positive-going input threshold voltage | VT+ | 1.5 | 1.87 | V | VCC = 3 V | 5 | |
| Positive-going input threshold voltage | VT+ | 2.16 | 2.74 | V | VCC = 4.5 V | 5 | |
| Positive-going input threshold voltage | VT+ | 2.61 | 3.33 | V | VCC = 5.5 V | 5 | |
| Negative-going input threshold voltage | VT- | 0.35 | 0.62 | V | VCC = 1.65 V | 5 | |
| Negative-going input threshold voltage | VT- | 0.58 | 0.87 | V | VCC = 2.3 V | 5 | |
| Negative-going input threshold voltage | VT- | 0.84 | 1.19 | V | VCC = 3 V | 5 | |
| Negative-going input threshold voltage | VT- | 1.41 | 1.9 | V | VCC = 4.5 V | 5 | |
| Negative-going input threshold voltage | VT- | 1.87 | 2.29 | V | VCC = 5.5 V | 5 | |
| Hysteresis (VT+, VT-) | ΔVT | 0.3 | 0.62 | V | VCC = 1.65 V | 5 | |
| Hysteresis (VT+, VT-) | ΔVT | 0.4 | 0.8 | V | VCC = 2.3 V | 5 | |
| Hysteresis (VT+, VT-) | ΔVT | 0.53 | 0.87 | V | VCC = 3 V | 5 | |
| Hysteresis (VT+, VT-) | ΔVT | 0.71 | 1.04 | V | VCC = 4.5 V | 5 | |
| Hysteresis (VT+, VT-) | ΔVT | 0.71 | 1.11 | V | VCC = 5.5 V | 5 | |
| High-level output voltage | VOH | 1.2 | V | IOH = -4 mA, VCC = 1.65 V | 5 | ||
| High-level output voltage | VOH | 1.9 | V | IOH = -8 mA, VCC = 2.3 V | 5 | ||
| High-level output voltage | VOH | 2.4 | V | IOH = -16 mA, VCC = 3 V | 5 | ||
| High-level output voltage | VOH | 2.3 | V | IOH = -24 mA, VCC = 3 V | 5 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = -32 mA, VCC = 4.5 V | 5 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 100 µA, VCC = 1.65 V to 5.5 V | 5 | ||
| Low-level output voltage | VOL | 0.45 | V | IOL = 4 mA, VCC = 1.65 V | 5 | ||
| Low-level output voltage | VOL | 0.3 | V | IOL = 8 mA, VCC = 2.3 V | 5 | ||
| Low-level output voltage | VOL | 0.4 | V | IOL = 16 mA, VCC = 3 V | 5 | ||
| Low-level output voltage | VOL | 0.55 | V | IOL = 24 mA, VCC = 3 V | 5 | ||
| Input leakage current | II | -5 | 5 | µA | VI = 5.5 V or GND, VCC = 0 V to 5.5 V | 5 | |
| Power-off leakage current | Ioff | -10 | 10 | µA | VI or VO = 5.5 V, VCC = 0 V | 5 | |
| Quiescent supply current | ICC | 10 | µA | VI = 5.5 V or GND, IO = 0, VCC = 1.65 V to 5.5 V | 5 | ||
| Additional quiescent supply current per input | ΔICC | 500 | µA | One input at VCC, 0.6 V, other inputs at VCC or GND, VCC = 3 V to 5.5 V | 5 | ||
| Propagation delay (Any In to Y) | tpd | 3.2 | 14.4 | ns | Figure 8, VCC = 1.8 V ± 0.15 V, TA = -40°C to 85°C | 6 | |
| Propagation delay (Any In to Y) | tpd | 2 | 8.3 | ns | Figure 8, VCC = 2.5 V ± 0.2 V, TA = -40°C to 85°C | 6 | |
| Propagation delay (Any In to Y) | tpd | 1.5 | 6.3 | ns | Figure 8, VCC = 3.3 V ± 0.3 V, TA = -40°C to 85°C | 6 | |
| Propagation delay (Any In to Y) | tpd | 1.1 | 5.1 | ns | Figure 8, VCC = 5 V ± 0.5 V, TA = -40°C to 85°C | 6 | |
| Supply voltage (operating) | VCC | 1.65 | 5.5 | V | Operating | 4 | |
| Supply voltage (data retention only) | VCC | 1.5 | V | Data retention only | 4 | ||
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage | VO | 0 | V | Max is VCC | 4 | ||
| High-level output current | IOH | -4 | mA | VCC = 1.65 V | 4 | ||
| High-level output current | IOH | -8 | mA | VCC = 2.3 V | 4 | ||
| High-level output current | IOH | -24 | mA | VCC = 3 V | 4 | ||
| High-level output current | IOH | -32 | mA | VCC = 4.5 V | 4 | ||
| Low-level output current | IOL | 4 | mA | VCC = 1.65 V | 4 | ||
| Low-level output current | IOL | 8 | mA | VCC = 2.3 V | 4 | ||
| Low-level output current | IOL | 24 | mA | VCC = 3 V | 4 | ||
| Low-level output current | IOL | 32 | mA | VCC = 4.5 V | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 4 | ||
| Supply voltage range | VCC | -0.5 | 6.5 | V | 4 | ||
| Input voltage range | VI | -0.5 | 6.5 | V | 4 | ||
| Voltage range applied to any output in the high-impedance or power-off state | VO | -0.5 | 6.5 | V | High-impedance or power-off state | 4 | |
| Voltage range applied to any output in the high or low state | VO | -0.5 | V | High or low state; max printed as VCC + 0.5 V | 4 | ||
| Input clamp current | IIK | -50 | mA | VI < 0 | 4 | ||
| Output clamp current | IOK | -50 | mA | VO < 0 | 4 | ||
| Continuous output current | IO | -50 | 50 | mA | 4 | ||
| Continuous current through VCC or GND | ICC | -100 | 100 | mA | 4 | ||
| Package thermal impedance | θJA | 259 | °C/W | Per JESD 51-7 | 4 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 |
CAD (KiCad official)
- Symbol:
SN74LVC1G98IDCKREP - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SC-70-6 (KiCad packages3D, STEP)
- 3D model files:
sn74lvc1g98idckrep-etched.step/sn74lvc1g98idckrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvc1g98idckrep.step/sn74lvc1g98idckrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (15 pp, sha256
53d321b60b022391, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).