component
SN74LVC1G86QDCKTQ1
Public Made by Adomby adom
Texas Instruments Logic Gates, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
SN74LVC1G86QDCKTQ1
Texas Instruments · Logic Gates · SC-70-5
SN74LVC1G86QDCKTQ1 from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Input A is overvoltage tolerant, accepting up to 5.5V at any valid VCC. |
| 2 | B | input | Input B is overvoltage tolerant, accepting up to 5.5V at any valid VCC. |
| 3 | GND | power_in | Ground reference pin for the device. |
| 4 | Y | output | Output Y is a balanced CMOS push-pull output rated for ±32mA at 4.5V and ±24mA at 3.3V. |
| 5 | VCC | power_in | Positive supply pin, operating from 1.65V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SC-70-5 |
| Category | Logic |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 6.5 | V | 4 | ||
| Input voltage | VI | -0.5 | 6.5 | V | 4 | ||
| Voltage applied to output in high-impedance or power-off state | VO | -0.5 | 6.5 | V | 4 | ||
| Input clamp current | IIK | -50 | mA | VI < 0 | 4 | ||
| Output clamp current | IOK | -50 | mA | VO < 0 | 4 | ||
| Continuous output current | IO | -50 | 50 | mA | 4 | ||
| Continuous current through VCC or GND | -100 | 100 | mA | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage operating | VCC | 1.65 | 5.5 | V | Operating | 4 | |
| Supply voltage data retention only | VCC | 1.5 | V | Data retention only | 4 | ||
| High-level input voltage | VIH | 1.7 | V | VCC = 2.3 V to 2.7 V | 4 | ||
| High-level input voltage | VIH | 2 | V | VCC = 3 V to 3.6 V | 4 | ||
| Low-level input voltage | VIL | 0.7 | V | VCC = 2.3 V to 2.7 V | 4 | ||
| Low-level input voltage | VIL | 0.8 | V | VCC = 3 V to 3.6 V | 4 | ||
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage | VO | 0 | V | 4 | |||
| High-level output current | IOH | -4 | mA | VCC = 1.65 V | 5 | ||
| High-level output current | IOH | -8 | mA | VCC = 2.3 V | 5 | ||
| High-level output current | IOH | -16 | mA | VCC = 3 V | 5 | ||
| High-level output current | IOH | -24 | mA | VCC = 3 V | 5 | ||
| High-level output current | IOH | -32 | mA | VCC = 4.5 V | 5 | ||
| Low-level output current | IOL | 4 | mA | VCC = 1.65 V | 5 | ||
| Low-level output current | IOL | 8 | mA | VCC = 2.3 V | 5 | ||
| Low-level output current | IOL | 16 | mA | VCC = 3 V | 5 | ||
| Low-level output current | IOL | 24 | mA | VCC = 3 V | 5 | ||
| Low-level output current | IOL | 32 | mA | VCC = 4.5 V | 5 | ||
| Input transition rise or fall rate | Δt/Δv | 20 | ns/V | VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V | 5 | ||
| Input transition rise or fall rate | Δt/Δv | 10 | ns/V | VCC = 3.3 V ± 0.3 V | 5 | ||
| Input transition rise or fall rate | Δt/Δv | 5 | ns/V | VCC = 5 V ± 0.5 V | 5 | ||
| Operating free-air temperature (DCK package) | TA | -40 | 125 | °C | DCK package | 5 | |
| High-level output voltage | VOH | 1.2 | V | IOH = -4 mA, VCC = 1.65 V | 5 | ||
| High-level output voltage | VOH | 1.9 | V | IOH = -8 mA, VCC = 2.3 V | 5 | ||
| High-level output voltage | VOH | 2.4 | V | IOH = -16 mA, VCC = 3 V | 5 | ||
| High-level output voltage | VOH | 2.3 | V | IOH = -24 mA, VCC = 3 V | 5 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = -32 mA, VCC = 4.5 V | 5 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 100 µA, VCC = 1.65 V to 5.5 V | 5 | ||
| Low-level output voltage | VOL | 0.45 | V | IOL = 4 mA, VCC = 1.65 V | 5 | ||
| Low-level output voltage | VOL | 0.3 | V | IOL = 8 mA, VCC = 2.3 V | 5 | ||
| Low-level output voltage | VOL | 0.4 | V | IOL = 16 mA, VCC = 3 V | 5 | ||
| Low-level output voltage | VOL | 0.55 | V | IOL = 24 mA, VCC = 3 V | 5 | ||
| Input leakage current | II | -5 | 5 | µA | A or B input, VI = 5.5 V or GND | 5 | |
| Power-off leakage current | Ioff | -10 | 10 | µA | VI or VO = 5.5 V, VCC = 0 | 6 | |
| Quiescent supply current | ICC | 15 | µA | VI = VCC or GND, IO = 0, VCC = 1.65 V to 5.5 V | 6 | ||
| Additional quiescent supply current per input | ΔICC | 500 | µA | One input at VCC, 0.6 V, other inputs at VCC or GND, VCC = 3 V to 5.5 V | 6 | ||
| Propagation delay A or B to Y | tpd | 3.5 | 12 | ns | VCC = 1.8 V ± 0.15 V, CL = 30 pF or 50 pF, -40 °C to 125 °C | 6 | |
| Propagation delay A or B to Y | tpd | 1.8 | 7 | ns | VCC = 2.5 V ± 0.2 V, CL = 30 pF or 50 pF, -40 °C to 125 °C | 6 | |
| Propagation delay A or B to Y | tpd | 1.3 | 6 | ns | VCC = 3.3 V ± 0.3 V, CL = 30 pF or 50 pF, -40 °C to 125 °C | 6 | |
| Propagation delay A or B to Y | tpd | 1 | 5 | ns | VCC = 5 V ± 0.5 V, CL = 30 pF or 50 pF, -40 °C to 125 °C | 6 | |
| Junction-to-ambient thermal resistance | RθJA | 371 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 297.5 | °C/W | 5 | |||
| Junction-to-board thermal resistance | RθJB | 258.6 | °C/W | 5 | |||
| Junction-to-top characterization parameter | ψJT | 195.6 | °C/W | 5 | |||
| Junction-to-board characterization parameter | ψJB | 256.2 | °C/W | 5 | |||
| Input capacitance | Ci | 6 | pF | VI = VCC or GND, VCC = 3.3 V | 6 | ||
| Power dissipation capacitance | Cpd | 22 | pF | f = 10 MHz, VCC = 1.8 V, TA = 25°C | 6 | ||
| Power dissipation capacitance | Cpd | 24 | pF | f = 10 MHz, VCC = 5 V, TA = 25°C | 6 |
CAD (KiCad official)
- Symbol:
SN74LVC1G86QDCKTQ1 - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
sn74lvc1g86qdcktq1-etched.step/sn74lvc1g86qdcktq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvc1g86qdcktq1.step/sn74lvc1g86qdcktq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
fc6d1cc26d378af5, retrieved 2026-10-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74LVC1G86QDCKTQ1
**Texas Instruments** · Logic Gates · SC-70-5
SN74LVC1G86QDCKTQ1 from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Input A is overvoltage tolerant, accepting up to 5.5V at any valid VCC. |
| 2 | B | input | Input B is overvoltage tolerant, accepting up to 5.5V at any valid VCC. |
| 3 | GND | power_in | Ground reference pin for the device. |
| 4 | Y | output | Output Y is a balanced CMOS push-pull output rated for ±32mA at 4.5V and ±24mA at 3.3V. |
| 5 | VCC | power_in | Positive supply pin, operating from 1.65V to 5.5V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SC-70-5 |
| Category | Logic |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | | 6.5 | V | | 4 |
| Input voltage | VI | -0.5 | | 6.5 | V | | 4 |
| Voltage applied to output in high-impedance or power-off state | VO | -0.5 | | 6.5 | V | | 4 |
| Input clamp current | IIK | | | -50 | mA | VI < 0 | 4 |
| Output clamp current | IOK | | | -50 | mA | VO < 0 | 4 |
| Continuous output current | IO | -50 | | 50 | mA | | 4 |
| Continuous current through VCC or GND | | -100 | | 100 | mA | | 4 |
| Junction temperature | TJ | | | 150 | °C | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Supply voltage operating | VCC | 1.65 | | 5.5 | V | Operating | 4 |
| Supply voltage data retention only | VCC | 1.5 | | | V | Data retention only | 4 |
| High-level input voltage | VIH | 1.7 | | | V | VCC = 2.3 V to 2.7 V | 4 |
| High-level input voltage | VIH | 2 | | | V | VCC = 3 V to 3.6 V | 4 |
| Low-level input voltage | VIL | | | 0.7 | V | VCC = 2.3 V to 2.7 V | 4 |
| Low-level input voltage | VIL | | | 0.8 | V | VCC = 3 V to 3.6 V | 4 |
| Input voltage | VI | 0 | | 5.5 | V | | 4 |
| Output voltage | VO | 0 | | | V | | 4 |
| High-level output current | IOH | | | -4 | mA | VCC = 1.65 V | 5 |
| High-level output current | IOH | | | -8 | mA | VCC = 2.3 V | 5 |
| High-level output current | IOH | | | -16 | mA | VCC = 3 V | 5 |
| High-level output current | IOH | | | -24 | mA | VCC = 3 V | 5 |
| High-level output current | IOH | | | -32 | mA | VCC = 4.5 V | 5 |
| Low-level output current | IOL | | | 4 | mA | VCC = 1.65 V | 5 |
| Low-level output current | IOL | | | 8 | mA | VCC = 2.3 V | 5 |
| Low-level output current | IOL | | | 16 | mA | VCC = 3 V | 5 |
| Low-level output current | IOL | | | 24 | mA | VCC = 3 V | 5 |
| Low-level output current | IOL | | | 32 | mA | VCC = 4.5 V | 5 |
| Input transition rise or fall rate | Δt/Δv | | | 20 | ns/V | VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V | 5 |
| Input transition rise or fall rate | Δt/Δv | | | 10 | ns/V | VCC = 3.3 V ± 0.3 V | 5 |
| Input transition rise or fall rate | Δt/Δv | | | 5 | ns/V | VCC = 5 V ± 0.5 V | 5 |
| Operating free-air temperature (DCK package) | TA | -40 | | 125 | °C | DCK package | 5 |
| High-level output voltage | VOH | 1.2 | | | V | IOH = -4 mA, VCC = 1.65 V | 5 |
| High-level output voltage | VOH | 1.9 | | | V | IOH = -8 mA, VCC = 2.3 V | 5 |
| High-level output voltage | VOH | 2.4 | | | V | IOH = -16 mA, VCC = 3 V | 5 |
| High-level output voltage | VOH | 2.3 | | | V | IOH = -24 mA, VCC = 3 V | 5 |
| High-level output voltage | VOH | 3.8 | | | V | IOH = -32 mA, VCC = 4.5 V | 5 |
| Low-level output voltage | VOL | | | 0.1 | V | IOL = 100 µA, VCC = 1.65 V to 5.5 V | 5 |
| Low-level output voltage | VOL | | | 0.45 | V | IOL = 4 mA, VCC = 1.65 V | 5 |
| Low-level output voltage | VOL | | | 0.3 | V | IOL = 8 mA, VCC = 2.3 V | 5 |
| Low-level output voltage | VOL | | | 0.4 | V | IOL = 16 mA, VCC = 3 V | 5 |
| Low-level output voltage | VOL | | | 0.55 | V | IOL = 24 mA, VCC = 3 V | 5 |
| Input leakage current | II | -5 | | 5 | µA | A or B input, VI = 5.5 V or GND | 5 |
| Power-off leakage current | Ioff | -10 | | 10 | µA | VI or VO = 5.5 V, VCC = 0 | 6 |
| Quiescent supply current | ICC | | | 15 | µA | VI = VCC or GND, IO = 0, VCC = 1.65 V to 5.5 V | 6 |
| Additional quiescent supply current per input | ΔICC | | | 500 | µA | One input at VCC, 0.6 V, other inputs at VCC or GND, VCC = 3 V to 5.5 V | 6 |
| Propagation delay A or B to Y | tpd | 3.5 | | 12 | ns | VCC = 1.8 V ± 0.15 V, CL = 30 pF or 50 pF, -40 °C to 125 °C | 6 |
| Propagation delay A or B to Y | tpd | 1.8 | | 7 | ns | VCC = 2.5 V ± 0.2 V, CL = 30 pF or 50 pF, -40 °C to 125 °C | 6 |
| Propagation delay A or B to Y | tpd | 1.3 | | 6 | ns | VCC = 3.3 V ± 0.3 V, CL = 30 pF or 50 pF, -40 °C to 125 °C | 6 |
| Propagation delay A or B to Y | tpd | 1 | | 5 | ns | VCC = 5 V ± 0.5 V, CL = 30 pF or 50 pF, -40 °C to 125 °C | 6 |
| Junction-to-ambient thermal resistance | RθJA | | 371 | | °C/W | | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 297.5 | | °C/W | | 5 |
| Junction-to-board thermal resistance | RθJB | | 258.6 | | °C/W | | 5 |
| Junction-to-top characterization parameter | ψJT | | 195.6 | | °C/W | | 5 |
| Junction-to-board characterization parameter | ψJB | | 256.2 | | °C/W | | 5 |
| Input capacitance | Ci | | 6 | | pF | VI = VCC or GND, VCC = 3.3 V | 6 |
| Power dissipation capacitance | Cpd | | 22 | | pF | f = 10 MHz, VCC = 1.8 V, TA = 25°C | 6 |
| Power dissipation capacitance | Cpd | | 24 | | pF | f = 10 MHz, VCC = 5 V, TA = 25°C | 6 |
## CAD (KiCad official)
- Symbol: `SN74LVC1G86QDCKTQ1`
- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`
- 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files: `sn74lvc1g86qdcktq1-etched.step` / `sn74lvc1g86qdcktq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvc1g86qdcktq1.step` / `sn74lvc1g86qdcktq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74lvc1g86-q1) (21 pp, sha256 `fc6d1cc26d378af5`, retrieved 2026-10-27, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `off` (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74lvc1g86qdcktq1-datasheet.pdf)