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SN74LVC1G32DB

Public Made by Adom

by adom

lingxingic Logic Gates, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LVC1G32DB

lingxingic · Logic Gates · SOT-23-5

SN74LVC1G32DB from lingxingic, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input B data input of the 2-input OR gate; inputs accept voltages up to 5.5V (recommended VI 0 to 5.5V) and can be driven from 3.3V or 5V devices.
2 A input A data input of the 2-input OR gate; inputs accept voltages up to 5.5V (recommended VI 0 to 5.5V) and can be driven from 3.3V or 5V devices.
3 GND power_in Ground (0V) reference for all voltages on the device.
4 Y output Data output of the OR function (Y = A OR B); output is referenced to VCC and GND in active mode, with ±24mA drive at VCC=3.0V.
5 VCC power_in Supply voltage, specified from 1.65V to 5.5V (recommended operating range).

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOT-23-5
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage (recommended operating) VCC 1.65 5.5 V 6
input voltage (recommended operating) VI 0 5.5 V 6
output voltage (recommended operating) VO 0 V Active mode 6
output voltage (recommended operating) VO 0 5.5 V Power-down mode; VCC=0V 6
ambient temperature (recommended operating) Tamb -40 125 ℃ 6
supply voltage (absolute maximum) VCC -0.5 6.5 V 6
input voltage (absolute maximum) VI -0.5 6.5 V 6
output voltage (absolute maximum) VO -0.5 V Active mode 6
output voltage (absolute maximum) VO -0.5 6.5 V Power-down mode; VCC=0V 6
input clamping current IIK -50 mA VI < 0V 6
output clamping current IOK -50 50 mA VO > VCC or VO < 0V 6
output current IO -50 50 mA VO=0V to VCC 6
supply current ICC 100 mA 6
ground current IGND -100 mA 6
storage temperature Tstg -65 150 ℃ 6
total power dissipation Ptot 250 mW 6
soldering temperature TL 260 ℃ 10s 6
HIGH-level input voltage (Tamb=-40℃ to +125℃) VIH 1.7 V VCC=2.3V to 2.7V 8
HIGH-level input voltage (Tamb=-40℃ to +125℃) VIH 2 V VCC=2.7V to 3.6V 8
LOW-level input voltage (Tamb=-40℃ to +125℃) VIL 0.7 V VCC=2.3V to 2.7V 8
LOW-level input voltage (Tamb=-40℃ to +125℃) VIL 0.8 V VCC=2.7V to 3.6V 8
HIGH-level output voltage (Tamb=-40℃ to +125℃) VOH 0.95 V VI = VIH or VIL; IO=-4mA; VCC=1.65V 8
HIGH-level output voltage (Tamb=-40℃ to +125℃) VOH 1.7 V VI = VIH or VIL; IO=-8mA; VCC=2.3V 8
HIGH-level output voltage (Tamb=-40℃ to +125℃) VOH 1.9 V VI = VIH or VIL; IO=-12mA; VCC=2.7V 8
HIGH-level output voltage (Tamb=-40℃ to +125℃) VOH 2 V VI = VIH or VIL; IO=-24mA; VCC=3.0V 8
HIGH-level output voltage (Tamb=-40℃ to +125℃) VOH 3.4 V VI = VIH or VIL; IO=-32mA; VCC=4.5V 8
LOW-level output voltage (Tamb=-40℃ to +125℃) VOL 0.1 V VI = VIH or VIL; IO=100uA; VCC=1.65V to 5.5V 8
LOW-level output voltage (Tamb=-40℃ to +125℃) VOL 0.7 V VI = VIH or VIL; IO=4mA; VCC=1.65V 8
LOW-level output voltage (Tamb=-40℃ to +125℃) VOL 0.45 V VI = VIH or VIL; IO=8mA; VCC=2.3V 8
LOW-level output voltage (Tamb=-40℃ to +125℃) VOL 0.6 V VI = VIH or VIL; IO=12mA; VCC=2.7V 8
LOW-level output voltage (Tamb=-40℃ to +125℃) VOL 0.8 V VI = VIH or VIL; IO=24mA; VCC=3.0V 8
input leakage current (Tamb=-40℃ to +125℃) II -1 1 uA VI=5.5V or GND; VCC=0V to 5.5V 8
power-off leakage current (Tamb=-40℃ to +125℃) IOFF -2 2 uA VI or VO=5.5V; VCC=0V 8
supply current (Tamb=-40℃ to +125℃) ICC 4 uA VI=5.5V or GND; IO=0A; VCC=1.65V to 5.5V 8
additional supply current (Tamb=-40℃ to +125℃) ΔICC 500 uA per pin; VI=VCC-0.6V; IO=0A; VCC=2.3V to 5.5V 8
HIGH-level input voltage (Tamb=-40℃ to +85℃) VIH 1.7 V VCC=2.3V to 2.7V 7
HIGH-level input voltage (Tamb=-40℃ to +85℃) VIH 2 V VCC=2.7V to 3.6V 7
LOW-level input voltage (Tamb=-40℃ to +85℃) VIL 0.7 V VCC=2.3V to 2.7V 7
LOW-level input voltage (Tamb=-40℃ to +85℃) VIL 0.8 V VCC=2.7V to 3.6V 7
HIGH-level output voltage (Tamb=-40℃ to +85℃) VOH 1.2 V VI = VIH or VIL; IO=-4mA; VCC=1.65V 7
HIGH-level output voltage (Tamb=-40℃ to +85℃) VOH 1.9 V VI = VIH or VIL; IO=-8mA; VCC=2.3V 7
HIGH-level output voltage (Tamb=-40℃ to +85℃) VOH 2.2 V VI = VIH or VIL; IO=-12mA; VCC=2.7V 7
HIGH-level output voltage (Tamb=-40℃ to +85℃) VOH 2.3 V VI = VIH or VIL; IO=-24mA; VCC=3.0V 7
HIGH-level output voltage (Tamb=-40℃ to +85℃) VOH 3.8 V VI = VIH or VIL; IO=-32mA; VCC=4.5V 7
LOW-level output voltage (Tamb=-40℃ to +85℃) VOL 0.1 V VI = VIH or VIL; IO=100uA; VCC=1.65V to 5.5V 7
LOW-level output voltage (Tamb=-40℃ to +85℃) VOL 0.45 V VI = VIH or VIL; IO=4mA; VCC=1.65V 7
LOW-level output voltage (Tamb=-40℃ to +85℃) VOL 0.3 V VI = VIH or VIL; IO=8mA; VCC=2.3V 7
LOW-level output voltage (Tamb=-40℃ to +85℃) VOL 0.4 V VI = VIH or VIL; IO=12mA; VCC=2.7V 7
LOW-level output voltage (Tamb=-40℃ to +85℃) VOL 0.55 V VI = VIH or VIL; IO=24mA; VCC=3.0V 7
input leakage current (Tamb=-40℃ to +85℃) II -1 1 uA VI=5.5V or GND; VCC=0V to 5.5V 7
power-off leakage current (Tamb=-40℃ to +85℃) IOFF -2 2 uA VI or VO=5.5V; VCC=0V 7
supply current (Tamb=-40℃ to +85℃) ICC 4 uA VI=5.5V or GND; IO=0A; VCC=1.65V to 5.5V 7
additional supply current (Tamb=-40℃ to +85℃) ΔICC 500 uA per pin; VI=VCC-0.6V; IO=0A; VCC=2.3V to 5.5V 7
input capacitance (Tamb=-40℃ to +85℃) CI 5 pF VCC=3.3V; VI=GND to VCC 7

CAD (KiCad official)

  • Symbol: SN74LVC1G32DB
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc1g32db-etched.step / sn74lvc1g32db-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc1g32db.step / sn74lvc1g32db.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (16 pp, sha256 2d79245f5c1e5e10, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF