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SN74LVC1G32 Single OR Gate

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Single 2-input OR gate

logicsingle-gatelvccmostisot-23-5
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Made with kicad-footprint-generator 10.0 · KiCad file format 20260206
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docs sn74lvc1g32: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers interactive viewers · Ray
package.json Publish 0.1.0 · Ray
page.json sn74lvc1g32: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md sn74lvc1g32: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sn74lvc1g32-etched.fit.json sn74lvc1g32: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74lvc1g32-etched.glb sn74lvc1g32: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74lvc1g32-etched.step sn74lvc1g32: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
SN74LVC1G32.adom-lbr.json SN74LVC1G32: validated Fusion/EAGLE library + adom-lbr hub, generated from this page's KiCad sources · Ray
sn74lvc1g32.glb Publish 0.1.0 · Ray
sn74lvc1g32.kicad_mod Publish 0.1.0 · Ray
sn74lvc1g32.kicad_sym Publish 0.1.0 · Ray
sn74lvc1g32.lbr add validated EAGLE .lbr (Fusion library) · Ray
SN74LVC1G32.lbr SN74LVC1G32: validated Fusion/EAGLE library + adom-lbr hub, generated from this page's KiCad sources · Ray
sn74lvc1g32.step Publish 0.1.0 · Ray

SN74LVC1G32

Texas Instruments · Logic Gate · SOT-23-5

The SN74LVC1G32 is a single 2-input OR gate in the LVC family. Its output goes high when either input is high. The single-gate package places one gate at the board edge without a full quad package, running from 1.65 V to 5.5 V with 5 V-tolerant inputs.

Pinout

Pin Name Type Function
1 A input Logic input A of the 2-input OR gate. Accepts 0-5.5V regardless of VCC.
2 B input Logic input B of the 2-input OR gate. Accepts 0-5.5V regardless of VCC.
3 GND power_in Ground reference (0 V).
4 Y output Push-pull logic output Y = A + B. ±24 mA drive at 3.3V VCC.
5 VCC power_in Positive supply voltage. Recommended operating range approximately 1.65V-5.5V.

Key specifications

Parameter Value
Type Single 2-input OR gate
Logic family LVC (CMOS)
Supply voltage 1.65 V to 5.5 V
Input tolerance 5 V tolerant
Propagation delay 3.7 ns typ at 3.3 V
Operating temperature -40 C to 125 C

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC1G32DBVR
  • SN74LVC1G32DBVT
  • SN74LVC1G32DCKR
  • SN74LVC1G32DCKT
  • SN74LVC1G32DRYR
  • SN74LVC1G32DSFR
  • SN74LVC1G32YZPR
  • SN74LVC1G32DPWR

CAD (KiCad official)

  • Symbol: sn74lvc1g32.kicad_sym
  • Footprint: sn74lvc1g32.kicad_mod
  • 3D model: SOT-23-5 body from KiCad Package_TO_SOT_SMD/SOT-23-5.
  • 3D model files: sn74lvc1g32-etched.step / sn74lvc1g32-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc1g32.step / sn74lvc1g32.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 b64786a568abe6a7, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF