component

SN74LVC1G32 Single OR Gate

Public Made by Adom

by adom

Single 2-input OR gate

logicsingle-gatelvccmostisot-23-5
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Commit History

11 commits ← Back to Activity
sn74lvc1g32: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
Ray · c7f676b ·
sn74lvc1g32: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero
Ray · f38549e ·
sn74lvc1g32: laser-etched CAD + chip hero (factory 2.0.0 backfill)
Ray · 642eea6 ·
sn74lvc1g32: stamp component.logic (74LVC1G32) from component-ocean
Ray · a5a1bcb ·
sn74lvc1g32: backfill missing artifacts (etch, variants)
Ray · 4254396 ·
add validated EAGLE .lbr (Fusion library)
Ray · e10d7c6 ·
SN74LVC1G32: validated Fusion/EAGLE library + adom-lbr hub, generated from this page's KiCad sources
Ray · 60d1b1d ·
interactive viewers
Ray · 69801dd ·
CAD + datasheet + .step
Ray · 480be15 ·
Publish 0.1.0
Ray · 669f5cb ·
Initial commit: component/sn74lvc1g32
Ray · 7c0f6ab ·