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SN74LVC1G175DBVT

Texas Instruments · Flip Flops · SOT-23-6

SN74LVC1G175DBVT from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLK input Clock Input - Data from D is transferred to Q on the rising edge of CLK
2 GND power_in Ground
3 D input Data Input - Data transferred to Q on the rising edge of CLK when CLR is high
4 Q output Output - Captures data from D on rising edge of CLK; forced low when CLR is low
5 VCC power_out Power Supply - Operating voltage range 1.65 V to 5.5 V
6 CLR input Asynchronous Clear Input - When low, forces Q to low state independent of clock edge or data on D

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Logic
Pins 6

CAD (KiCad official)

  • Symbol: SN74LVC1G175DBVT
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc1g175dbvt-etched.step / sn74lvc1g175dbvt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc1g175dbvt.step / sn74lvc1g175dbvt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 6f19e0a69062e117, retrieved 2026-10-07, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF