component
SN74LVC1G175DBVR
Public Made by Adomby adom
SN74LVC1G175DBVR with verified pin map and explicitly nominal drawing-led 3D assets.
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page.json+130−8@@ -1,13 +1,140 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74lvc1g175dbvr",+ "title": "SN74LVC1G175DBVR",+ "brief": "Texas Instruments Flip Flops, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Flip Flops, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "sn74lvc1g175dbvr" ],+ "component": {+ "mpn": "SN74LVC1G175DBVR",+ "manufacturer": "Texas Instruments",+ "package": "SOT-23-6",+ "pin_count": 6,+ "category": "Logic",+ "subcategory": "Flip Flops",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74lvc1g175.pdf",+ "parts": {+ "symbol": "sn74lvc1g175dbvr.kicad_sym",+ "footprint": "sn74lvc1g175dbvr.kicad_mod",+ "model_3d": "sn74lvc1g175dbvr.glb",+ "model_3d_step": "sn74lvc1g175dbvr.step",+ "lbr": "sn74lvc1g175dbvr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "CLK",+ "type": "input",+ "description": "Clock input. Data on D is transferred to Q on the rising edge of CLK when CLR is high."+ },+ {+ "number": "2",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V) for the device."+ },+ {+ "number": "3",+ "name": "D",+ "type": "input",+ "description": "Data input to the D flip-flop. Sampled on the rising edge of CLK and transferred to Q when CLR is high."+ },+ {+ "number": "4",+ "name": "Q",+ "type": "output",+ "description": "Flip-flop output. Reflects the D input latched on the last CLK rising edge; forced low when CLR is asserted low. Drive strength \u00b124 mA at VCC = 3.3 V."+ },+ {+ "number": "5",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage input. Operating range 1.65 V to 5.5 V; inputs accept up to 5.5 V regardless of VCC."+ },+ {+ "number": "6",+ "name": "CLR",+ "type": "input",+ "description": "Active-low asynchronous clear input. When CLR is low, Q is forced low regardless of CLK or D; normal operation resumes when CLR is high."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74lvc1g175.pdf",+ "pages": 37,+ "sha256": "6f19e0a69062e117",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 6,+ "described": 6,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "SOT-23-6",+ "Category": "Logic",+ "Pins": "6"+ }+ },+ "variants": [+ {+ "mpn": "SN74LVC1G175DBVR",+ "kind": "packaging"+ },+ {+ "mpn": "SN74LVC1G175DBVRDBVT",+ "kind": "packaging"+ },+ {+ "mpn": "SN74LVC1G175DBVRDCKR",+ "kind": "packaging"+ },+ {+ "mpn": "SN74LVC1G175DBVRDCKT",+ "kind": "packaging"+ },+ {+ "mpn": "SN74LVC1G175DBVRDRYR",+ "kind": "packaging"+ },+ {+ "mpn": "SN74LVC1G175DBVRYZPR",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "sn74lvc1g175dbvr"+ ],+ "discovery_pitch": "SN74LVC1G175DBVR (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +152,5 @@ "docs/sn74lvc1g175dbvr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }