component
SN74LVC1G14DCKR-MS
Public Made by Adomby adom
MSKSEMI Logic Gates, SC70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
SN74LVC1G14DCKR-MS
MSKSEMI · Logic Gates · SC70-5
SN74LVC1G14DCKR-MS from MSKSEMI, in a SC70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection; the pin is an empty pin with no internal wire and can be left unconnected. |
| 2 | A | input | Schmitt-trigger inverter input; the input voltage range is 0 V to 5.5 V. |
| 3 | GND | power_in | Ground (power supply ground) reference pin. |
| 4 | Y | output | Inverter output; output voltage range is 0 V to VCC, and the single-pin output current is rated at 25 mA maximum. |
| 5 | VCC | power_in | Positive supply pin; operating supply range is 1.65 V to 5.5 V, with an absolute maximum of 6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SC70-5 |
| Category | Logic |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 1.65 | 5.5 | V | 3 | ||
| High-level input voltage | VIH | 1.7 | V | VCC =2.3V~2.7V | 3 | ||
| Input voltage, low-level threshold (second VIH block, printed symbol VIH) | VIH | 0.7 | V | VCC =2.3V~2.7V | 3 | ||
| Input voltage | VI | 0 | 5.5 | V | 3 | ||
| High-level output current | IOH | -4 | mA | VCC =1.65V | 3 | ||
| High-level output current | IOH | -8 | mA | VCC =2.3V | 3 | ||
| High-level output current | IOH | -16 | mA | VCC =3V | 3 | ||
| High-level output current | IOH | -32 | mA | VCC =4.5V | 3 | ||
| Low-level output current | IOL | 4 | mA | VCC =1.65V | 3 | ||
| Low-level output current | IOL | 8 | mA | VCC =2.3V | 3 | ||
| Low-level output current | IOL | 16 | mA | VCC =3V | 3 | ||
| Low-level output current | IOL | 32 | mA | VCC =4.5V | 3 | ||
| Supply voltage (absolute maximum) | VCC | 6.5 | V | 3 | |||
| Input voltage (absolute maximum) | VIN | -0.5 | 6.5 | V | 3 | ||
| Output voltage (absolute maximum) | VOUT | -0.5 | 6.5 | V | 3 | ||
| Output current per pin (absolute maximum) | IOUT | 25 | mA | 3 | |||
| VCC or GND current (absolute maximum) | ICC | 50 | mA | 3 | |||
| Storage temperature (absolute maximum) | TS | -65 | 150 | ℃ | 3 | ||
| Lead soldering temperature (absolute maximum) | TW | 260 | ℃ | 10s | 3 | ||
| Input leakage current | II | -5 | 0.01 | 5 | uA | VI =5.5V or GND, VCC 0~5.5V | 4 |
| Power-off leakage current (input) | IOFF | -10 | 0.01 | 10 | uA | VI =5.5V, VCC =0 | 4 |
| Power-off leakage current (output) | IOFF | -10 | 0.01 | 10 | uA | VO =5.5V, VCC =0 | 4 |
| Quiescent supply current | ICC | 0.01 | 10 | uA | VI =5.5V, IO =0, VCC 1.65V~5.5V | 4 |
CAD (KiCad official)
- Symbol:
SN74LVC1G14DCKR-MS - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC70-5 (KiCad packages3D, STEP)
- 3D model files:
sn74lvc1g14dckr-ms-etched.step/sn74lvc1g14dckr-ms-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvc1g14dckr-ms.step/sn74lvc1g14dckr-ms.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MSKSEMI datasheet (13 pp, sha256
afb05084ed821933, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74LVC1G14DCKR-MS
**MSKSEMI** · Logic Gates · SC70-5
SN74LVC1G14DCKR-MS from MSKSEMI, in a SC70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection; the pin is an empty pin with no internal wire and can be left unconnected. |
| 2 | A | input | Schmitt-trigger inverter input; the input voltage range is 0 V to 5.5 V. |
| 3 | GND | power_in | Ground (power supply ground) reference pin. |
| 4 | Y | output | Inverter output; output voltage range is 0 V to VCC, and the single-pin output current is rated at 25 mA maximum. |
| 5 | VCC | power_in | Positive supply pin; operating supply range is 1.65 V to 5.5 V, with an absolute maximum of 6.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SC70-5 |
| Category | Logic |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 1.65 | | 5.5 | V | | 3 |
| High-level input voltage | VIH | 1.7 | | | V | VCC =2.3V~2.7V | 3 |
| Input voltage, low-level threshold (second VIH block, printed symbol VIH) | VIH | | | 0.7 | V | VCC =2.3V~2.7V | 3 |
| Input voltage | VI | 0 | | 5.5 | V | | 3 |
| High-level output current | IOH | | | -4 | mA | VCC =1.65V | 3 |
| High-level output current | IOH | | | -8 | mA | VCC =2.3V | 3 |
| High-level output current | IOH | | | -16 | mA | VCC =3V | 3 |
| High-level output current | IOH | | | -32 | mA | VCC =4.5V | 3 |
| Low-level output current | IOL | | | 4 | mA | VCC =1.65V | 3 |
| Low-level output current | IOL | | | 8 | mA | VCC =2.3V | 3 |
| Low-level output current | IOL | | | 16 | mA | VCC =3V | 3 |
| Low-level output current | IOL | | | 32 | mA | VCC =4.5V | 3 |
| Supply voltage (absolute maximum) | VCC | | | 6.5 | V | | 3 |
| Input voltage (absolute maximum) | VIN | -0.5 | | 6.5 | V | | 3 |
| Output voltage (absolute maximum) | VOUT | -0.5 | | 6.5 | V | | 3 |
| Output current per pin (absolute maximum) | IOUT | | | 25 | mA | | 3 |
| VCC or GND current (absolute maximum) | ICC | | | 50 | mA | | 3 |
| Storage temperature (absolute maximum) | TS | -65 | | 150 | ℃ | | 3 |
| Lead soldering temperature (absolute maximum) | TW | | | 260 | ℃ | 10s | 3 |
| Input leakage current | II | -5 | 0.01 | 5 | uA | VI =5.5V or GND, VCC 0~5.5V | 4 |
| Power-off leakage current (input) | IOFF | -10 | 0.01 | 10 | uA | VI =5.5V, VCC =0 | 4 |
| Power-off leakage current (output) | IOFF | -10 | 0.01 | 10 | uA | VO =5.5V, VCC =0 | 4 |
| Quiescent supply current | ICC | | 0.01 | 10 | uA | VI =5.5V, IO =0, VCC 1.65V~5.5V | 4 |
## CAD (KiCad official)
- Symbol: `SN74LVC1G14DCKR-MS`
- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`
- 3D model: SC70-5 (KiCad packages3D, STEP)
- 3D model files: `sn74lvc1g14dckr-ms-etched.step` / `sn74lvc1g14dckr-ms-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvc1g14dckr-ms.step` / `sn74lvc1g14dckr-ms.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [MSKSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755816320732942336) (13 pp, sha256 `afb05084ed821933`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74lvc1g14dckr-ms-datasheet.pdf)