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docs sn74lvc1g132dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json sn74lvc1g132dbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray
README.md sn74lvc1g132dbvr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sn74lvc1g132dbvr-etched.fit.json sn74lvc1g132dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn74lvc1g132dbvr-etched.glb sn74lvc1g132dbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray
sn74lvc1g132dbvr-etched.step sn74lvc1g132dbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray
sn74lvc1g132dbvr.glb Publish 0.1.0 · Ray
sn74lvc1g132dbvr.kicad_mod Publish 0.1.0 · Ray
sn74lvc1g132dbvr.kicad_sym Publish 0.1.0 · Ray
sn74lvc1g132dbvr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sn74lvc1g132dbvr.step Publish 0.1.0 · Ray

SN74LVC1G132DBVR

Texas Instruments · Gates · SOT-23-5

SN74LVC1G132DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input A logic input to the 2-input NAND gate. Schmitt-trigger input; accepts 0 V to 5.5 V regardless of VCC (partial-power-down tolerant via Ioff).
2 B input B logic input to the 2-input NAND gate. Schmitt-trigger input; accepts 0 V to 5.5 V regardless of VCC (partial-power-down tolerant via Ioff).
3 GND power_in Ground reference (0 V) for the device.
4 Y output NAND logic output: Y = NOT(A AND B). Push-pull CMOS output capable of ±24 mA drive at VCC = 3 V (±32 mA at 4.5 V).
5 VCC power_in Positive supply pin. Operating range 1.65 V to 5.5 V (data retention down to 1.5 V). Bypass with a local decoupling capacitor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC1G132DBVR
  • SN74LVC1G132DBVRDBVT
  • SN74LVC1G132DBVRDCKR
  • SN74LVC1G132DBVRDCKT

CAD (KiCad official)

  • Symbol: SN74LVC1G132DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc1g132dbvr-etched.step / sn74lvc1g132dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc1g132dbvr.step / sn74lvc1g132dbvr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sn74lvc1g132dbvr.step 85 KB You want the bare part, or you mark your own boards.
sn74lvc1g132dbvr-etched.step 2.4 MB You want the part with SN74LVC1G132DBVR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 604 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 fae33d78fe46834a, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF