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SN74LVC1G126DRLR

Public Made by Adom

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOT-553-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LVC1G126DRLR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOT-553-5

SN74LVC1G126DRLR from Texas Instruments, in a SOT-553-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-high output enable input; passes true data from A to Y when high, places Y in high-impedance when low.
2 A input Input data pin accepting voltages to 5.5V for buffering to Y output.
3 GND power_in Ground reference pin.
4 Y output 3-state buffered output with ±24mA drive at 3.3V; active when OE is high.
5 VCC power_out Positive supply voltage pin operating at 5V with 6.5V absolute maximum rating.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-553-5
Category Logic
Pins 5

CAD (KiCad official)

  • Symbol: SN74LVC1G126DRLR
  • Footprint: Package_TO_SOT_SMD:SOT-553
  • 3D model: SOT-553-5 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc1g126drlr-etched.step / sn74lvc1g126drlr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc1g126drlr.step / sn74lvc1g126drlr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (49 pp, sha256 c73611ec7322b956, retrieved 2026-10-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF