# SN74LVC1G08IDCKREP

**Texas Instruments** · Logic Gates · SC-70-5

SN74LVC1G08IDCKREP from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | First input of 2-input AND gate; accepts input voltages from 0 to 5.5 V |
| 2 | B | input | Second input of 2-input AND gate; accepts input voltages from 0 to 5.5 V |
| 3 | GND | power_in | Ground connection; negative supply return |
| 4 | Y | output | Output of AND gate implementing Y = A AND B; provides source/sink current ±24 mA at 3.3 V |
| 5 | VCC | power_in | Positive supply voltage; operating range 1.65 V to 5.5 V with maximum 10 µA quiescent current |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SC-70-5 |
| Category | Logic |
| Pins | 5 |

## CAD (KiCad official)

- Symbol: `SN74LVC1G08IDCKREP`
- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`
- 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files: `sn74lvc1g08idckrep-etched.step` / `sn74lvc1g08idckrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvc1g08idckrep.step` / `sn74lvc1g08idckrep.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74lvc1g08-ep) (18 pp, sha256 `d9026ca0342c3325`, retrieved 2026-10-01, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74lvc1g08idckrep-datasheet.pdf)