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SN74LVC1G08DCKRE4

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Texas Instruments Gates, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssn74lvc1g08dckre4factory-2.0.0extractor-text

Verified SN74LVC1G08DCKRE4

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 5 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN74LVC1G08DCKRE4 · SC-70-5 · 5 pins
  • ✓copper: 5 copper pads, none touching another net
  • ✓datasheet: all 5 pin names found in the 46-page datasheet
  • ✓distributor: lcsc C4472088, digikey 296-35940-2-ND, mouser 595-SN74LVC1G08DCKE4
  • ✓family: SOT-353_SC-70-5
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-r8krc6mp/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 5 pins = 5 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 5 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn74lvc1g08dckre4.kicad_sym✓ sn74lvc1g08dckre4.kicad_mod✓ sn74lvc1g08dckre4.step
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SN74LVC1G08DCKRE4

Texas Instruments · Gates · SC-70-5

SN74LVC1G08DCKRE4 from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Gate input A; inputs accept voltages up to 5.5 V.
2 B input Gate input B; inputs accept voltages up to 5.5 V.
3 GND power_in Ground.
4 Y output Gate output Y = A AND B, with ±24 mA output drive at 3.3 V.
5 VCC power_in Power supply pin, operating from 1.65 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SC-70-5
Category Logic ICs
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High-level output voltage VOH 1.2 V IOH = -4 mA, VCC = 1.65 V 6
High-level output voltage VOH 1.9 V IOH = -8 mA, VCC = 2.3 V 6
High-level output voltage VOH 2.4 V IOH = -16 mA, VCC = 3 V 6
High-level output voltage VOH 2.3 V IOH = -24 mA, VCC = 3 V 6
High-level output voltage VOH 3.8 V IOH = -32 mA, VCC = 4.5 V 6
Low-level output voltage VOL 0.1 V IOL = 100 µA, VCC = 1.65 V to 5.5 V 6
Low-level output voltage VOL 0.45 V IOL = 4 mA, VCC = 1.65 V 6
Low-level output voltage VOL 0.3 V IOL = 8 mA, VCC = 2.3 V 6
Low-level output voltage VOL 0.4 V IOL = 16 mA, VCC = 3 V 6
Low-level output voltage VOL 0.55 V IOL = 24 mA, VCC = 3 V 6
Input current, A or B inputs II -5 5 µA VI = 5.5 V or GND, VCC = 0 to 5.5 V 6
Power-off leakage current Ioff -10 10 µA VI or VO = 5.5 V, VCC = 0 6
Supply current ICC 10 µA VI = 5.5 V or GND, IO = 0, VCC = 1.65 V to 5.5 V 6
Additional supply current per input ΔICC 500 µA One input at VCC - 0.6 V, other inputs at VCC or GND, VCC = 3 V to 5.5 V 6
Input capacitance Ci 4 pF VI = VCC or GND, VCC = 3.3 V 6
Propagation delay A or B to Y tpd 1.5 7.2 ns VCC = 1.8 V ± 0.15 V, CL = 15 pF, -40°C to 85°C 6
Propagation delay A or B to Y tpd 0.7 4.4 ns VCC = 2.5 V ± 0.2 V, CL = 15 pF, -40°C to 85°C 6
Propagation delay A or B to Y tpd 0.8 3.6 ns VCC = 3.3 V ± 0.3 V, CL = 15 pF, -40°C to 85°C 6
Propagation delay A or B to Y tpd 0.8 3.4 ns VCC = 5 V ± 0.5 V, CL = 15 pF, -40°C to 85°C 6
Propagation delay A or B to Y tpd 2.4 8 ns VCC = 1.8 V ± 0.15 V, -40°C to 85°C 6
Propagation delay A or B to Y tpd 1.1 5.5 ns VCC = 2.5 V ± 0.2 V, -40°C to 85°C 6
Propagation delay A or B to Y tpd 1 4.5 ns VCC = 3.3 V ± 0.3 V, CL = 30 pF or 50 pF, -40°C to 85°C 7
Propagation delay A or B to Y tpd 1 4 ns VCC = 5 V ± 0.5 V, CL = 30 pF or 50 pF, -40°C to 85°C 7
Power dissipation capacitance Cpd 21 pF f = 10 MHz, VCC = 1.8 V, TA = 25°C 7
Power dissipation capacitance Cpd 24 pF f = 10 MHz, VCC = 2.5 V, TA = 25°C 7
Power dissipation capacitance Cpd 26 pF f = 10 MHz, VCC = 3.3 V, TA = 25°C 7
Power dissipation capacitance Cpd 31 pF f = 10 MHz, VCC = 5 V, TA = 25°C 7
Supply voltage range VCC -0.5 6.5 V 4
Input voltage range VI -0.5 6.5 V 4
Output voltage range, high-impedance or power-off state VO -0.5 6.5 V output in the high-impedance or power-off state 4
Output voltage range, high or low state VO -0.5 V output in the high or low state; max is VCC + 0.5 V 4
Input clamp current IIK -50 mA VI < 0 4
Output clamp current IOK -50 mA VO < 0 4
Continuous output current IO -50 50 mA 4
Continuous current through VCC or GND -100 100 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
ESD, human body model V(ESD) 0 2000 V HBM, per ANSI/ESDA/JEDEC JS-001, all pins 4
ESD, charged device model V(ESD) 0 1000 V CDM, per JESD22-C101, all pins 4
Supply voltage, operating VCC 1.65 5.5 V Operating 5
Supply voltage, data retention only VCC 1.5 V Data retention only 5
High-level input voltage VIH 1.7 V VCC = 2.3 V to 2.7 V 5
High-level input voltage VIH 2 V VCC = 3 V to 3.6 V 5
Low-level input voltage VIL 0.7 V VCC = 2.3 V to 2.7 V 5
Low-level input voltage VIL 0.8 V VCC = 3 V to 3.6 V 5
Input voltage VI 0 5.5 V 5
Output voltage VO 0 V max is VCC 5
High-level output current IOH -4 mA VCC = 1.65 V 5
High-level output current IOH -8 mA VCC = 2.3 V 5
High-level output current IOH -16 mA VCC = 3 V 5
High-level output current IOH -24 mA VCC = 3 V 5
High-level output current IOH -32 mA VCC = 4.5 V 5
Low-level output current IOL 32 mA VCC = 4.5 V 5
Input transition rise or fall rate Δt/Δv 20 ns/V VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 5
Operating free-air temperature TA -40 125 °C 5
Junction-to-ambient thermal resistance RθJA 283.1 °C/W DCK, 5 pins 5
Junction-to-case (top) thermal resistance RθJCtop 92.3 °C/W DCK, 5 pins 5
Junction-to-board thermal resistance RθJB 60.9 °C/W DCK, 5 pins 5
Junction-to-top characterization parameter ψJT 1.7 °C/W DCK, 5 pins 5
Junction-to-board characterization parameter ψJB 60.1 °C/W DCK, 5 pins 5

CAD (KiCad official)

  • Symbol: SN74LVC1G08DCKRE4
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc1g08dckre4-etched.step / sn74lvc1g08dckre4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc1g08dckre4.step / sn74lvc1g08dckre4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (46 pp, sha256 137a8f31de82033b, retrieved 2026-10-31, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF