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SN74LVC1G08DC

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lingxingic Logic Gates, SOT-353. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74LVC1G08DC

lingxingic · Logic Gates · SOT-353

SN74LVC1G08DC from lingxingic, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Data input A of the 2-input AND gate; inputs may be driven from 3.3 V or 5 V devices, with a recommended input voltage range of 0 V to 5.5 V.
2 B input Data input B of the 2-input AND gate; inputs may be driven from 3.3 V or 5 V devices, with a recommended input voltage range of 0 V to 5.5 V.
3 GND power_in Ground (0 V) reference for the device.
4 Y output Data output of the AND function (Y = A AND B); drive is ±24 mA at VDD = 3.0 V.
5 VDD power_in Supply voltage; recommended operating range is 1.65 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOT-353
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VDD -0.5 6.5 V 6
input clamping current IIK -50 mA VI < 0V 6
input voltage VI -0.5 6.5 V 6
output clamping current IOK -50 50 mA VO > VDD or VO < 0V 6
output voltage VO -0.5 V Active mode 6
output voltage VO -0.5 6.5 V Power-down mode 6
output current IO -50 50 mA VO=0V to VDD 6
supply current IDD 100 mA 6
ground current IGND -100 mA 6
storage temperature Tstg -65 150 ℃ 6
total power dissipation Ptot 250 mW 6
soldering temperature TL 260 ℃ 10s 6
supply voltage VDD 1.65 5.5 V 6
input voltage VI 0 5.5 V 6
output voltage VO 0 V Active mode 6
output voltage VO 0 5.5 V Power-down mode; VDD=0V 6
ambient temperature Tamb -40 125 ℃ 6
HIGH-level input voltage VIH 1.7 V VDD=2.3V to 2.7V 8
HIGH-level input voltage VIH 2 V VDD=2.7V to 3.6V 8
LOW-level input voltage VIL 0.7 V VDD=2.3V to 2.7V 8
LOW-level input voltage VIL 0.8 V VDD=2.7V to 3.6V 8
HIGH-level output voltage VOH 0.95 V IO=-4mA; VDD=1.65V 8
HIGH-level output voltage VOH 1.7 V IO=-8mA; VDD=2.3V 8
HIGH-level output voltage VOH 1.9 V IO=-12mA; VDD=2.7V 8
HIGH-level output voltage VOH 2 V IO=-24mA; VDD=3.0V 8
HIGH-level output voltage VOH 3.4 V IO=-32mA; VDD=4.5V 8
LOW-level output voltage VOL 0.1 V IO=100uA; VDD=1.65V to 5.5V 8
LOW-level output voltage VOL 0.7 V IO=4mA; VDD=1.65V 8
LOW-level output voltage VOL 0.45 V IO=8mA; VDD=2.3V 8
LOW-level output voltage VOL 0.6 V IO=12mA; VDD=2.7V 8
LOW-level output voltage VOL 0.8 V IO=24mA; VDD=3.0V 8
input leakage current II -1 1 uA VI=5.5V or GND; VDD=0V to 5.5V 8
power-off leakage current IOFF -2 2 uA VI or VO=5.5V; VDD=0V 8
supply current IDD 4 uA VI=5.5V or GND; IO=0A; VDD=1.65V to 5.5V 8
additional supply current ΔIDD 500 uA per pin; VI=VDD-0.6V; IO=0A; VDD=2.3V to 5.5V 8
propagation delay A, B to Y (tPHL) tPHL 20.8 ns see Figure 5; VCC=1.65V to 1.95V 9
propagation delay A, B to Y (tPHL) tPHL 17.8 ns see Figure 5; VCC=2.3V to 2.7V 9
propagation delay A, B to Y (tPHL) tPHL 17 ns see Figure 5; VCC=2.7V 9
propagation delay A, B to Y (tPHL) tPHL 16.3 ns see Figure 5; VCC=3.0V to 3.6V 9
propagation delay A, B to Y (tPHL) tPHL 15.5 ns see Figure 5; VCC=4.5V to 5.5V 9
propagation delay A, B to Y (tPLH) tPLH 23 ns see Figure 5; VCC=1.65V to 1.95V 9
propagation delay A, B to Y (tPLH) tPLH 17 ns see Figure 5; VCC=2.3V to 2.7V 9
propagation delay A, B to Y (tPLH) tPLH 16.3 ns see Figure 5; VCC=2.7V 9
propagation delay A, B to Y (tPLH) tPLH 14.8 ns see Figure 5; VCC=3.0V to 3.6V 9
propagation delay A, B to Y (tPLH) tPLH 13.3 ns see Figure 5; VCC=4.5V to 5.5V 9
input capacitance CI 5 pF VDD=3.3V; VI=GND to VDD 7

CAD (KiCad official)

  • Symbol: SN74LVC1G08DC
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc1g08dc-etched.step / sn74lvc1g08dc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc1g08dc.step / sn74lvc1g08dc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (15 pp, sha256 bc71f63a4defe976, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF