# SN74LVC1G08DB

**lingxingic** · Logic Gates · SOT-23-5

SN74LVC1G08DB from lingxingic, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Data input A of the 2-input AND gate; recommended input voltage is 0 to 5.5V and absolute maximum input voltage is -0.5 to +6.5V. |
| 2 | B | input | Data input B of the 2-input AND gate; recommended input voltage is 0 to 5.5V and absolute maximum input voltage is -0.5 to +6.5V. |
| 3 | GND | power_in | Ground (0V) reference for all voltages on the device. |
| 4 | Y | output | Data output of the AND function; output drive is ±24mA at VDD=3.0V and output current is limited to ±50mA absolute maximum. |
| 5 | VDD | power_in | Supply voltage with recommended operating range of 1.65V to 5.5V and absolute maximum of +6.5V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOT-23-5 |
| Category | Logic |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VDD | -0.5 |  | 6.5 | V |  | 6 |
| input clamping current | IIK | -50 |  |  | mA | VI < 0V | 6 |
| input voltage | VI | -0.5 |  | 6.5 | V |  | 6 |
| output clamping current | IOK | -50 |  | 50 | mA | VO > VDD or VO < 0V | 6 |
| output voltage (active mode) | VO | -0.5 |  |  | V | Active mode | 6 |
| output voltage (power-down mode) | VO | -0.5 |  | 6.5 | V | Power-down mode | 6 |
| output current | IO | -50 |  | 50 | mA | VO=0V to VDD | 6 |
| supply current | IDD |  |  | 100 | mA |  | 6 |
| ground current | IGND | -100 |  |  | mA |  | 6 |
| storage temperature | Tstg | -65 |  | 150 | ℃ |  | 6 |
| total power dissipation | Ptot |  |  | 250 | mW |  | 6 |
| soldering temperature | TL |  |  | 260 | ℃ | 10s | 6 |
| supply voltage | VDD | 1.65 |  | 5.5 | V |  | 6 |
| input voltage | VI | 0 |  | 5.5 | V |  | 6 |
| output voltage (active mode) | VO | 0 |  |  | V | Active mode | 6 |
| output voltage (power-down mode) | VO | 0 |  | 5.5 | V | Power-down mode; VDD=0V | 6 |
| ambient temperature | Tamb | -40 |  | 125 | ℃ |  | 6 |
| HIGH-level input voltage | VIH | 1.7 |  |  | V | Tamb=-40℃ to +125℃; VDD=2.3V to 2.7V | 8 |
| HIGH-level input voltage | VIH | 2 |  |  | V | Tamb=-40℃ to +125℃; VDD=2.7V to 3.6V | 8 |
| LOW-level input voltage | VIL |  |  | 0.7 | V | Tamb=-40℃ to +125℃; VDD=2.3V to 2.7V | 8 |
| LOW-level input voltage | VIL |  |  | 0.8 | V | Tamb=-40℃ to +125℃; VDD=2.7V to 3.6V | 8 |
| HIGH-level output voltage | VOH | 0.95 |  |  | V | Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-4mA; VDD=1.65V | 8 |
| HIGH-level output voltage | VOH | 1.7 |  |  | V | Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-8mA; VDD=2.3V | 8 |
| HIGH-level output voltage | VOH | 1.9 |  |  | V | Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-12mA; VDD=2.7V | 8 |
| HIGH-level output voltage | VOH | 2 |  |  | V | Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-24mA; VDD=3.0V | 8 |
| HIGH-level output voltage | VOH | 3.4 |  |  | V | Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=-32mA; VDD=4.5V | 8 |
| LOW-level output voltage | VOL |  |  | 0.1 | V | Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=100uA; VDD=1.65V to 5.5V | 8 |
| LOW-level output voltage | VOL |  |  | 0.7 | V | Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=4mA; VDD=1.65V | 8 |
| LOW-level output voltage | VOL |  |  | 0.45 | V | Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=8mA; VDD=2.3V | 8 |
| LOW-level output voltage | VOL |  |  | 0.6 | V | Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=12mA; VDD=2.7V | 8 |
| LOW-level output voltage | VOL |  |  | 0.8 | V | Tamb=-40℃ to +125℃; VI = VIH or VIL; IO=24mA; VDD=3.0V | 8 |
| input leakage current | II | -1 |  | 1 | uA | Tamb=-40℃ to +125℃; VI=5.5V or GND; VDD=0V to 5.5V | 8 |
| power-off leakage current | IOFF | -2 |  | 2 | uA | Tamb=-40℃ to +125℃; VI or VO=5.5V; VDD=0V | 8 |
| supply current | IDD |  |  | 4 | uA | Tamb=-40℃ to +125℃; VI=5.5V or GND; IO=0A; VDD=1.65V to 5.5V | 8 |
| additional supply current | ΔIDD |  |  | 500 | uA | Tamb=-40℃ to +125℃; per pin; VI=VDD-0.6V; IO=0A; VDD=2.3V to 5.5V | 8 |
| A, B to Y propagation delay (HIGH-to-LOW) | tPHL |  | 12.5 | 18.8 | ns | Tamb=-40℃ to +85℃; see Figure 5; VCC=1.65V to 1.95V | 9 |
| A, B to Y propagation delay (HIGH-to-LOW) | tPHL |  | 10.5 | 15.8 | ns | Tamb=-40℃ to +85℃; see Figure 5; VCC=2.3V to 2.7V | 9 |
| A, B to Y propagation delay (HIGH-to-LOW) | tPHL |  | 10 | 15 | ns | Tamb=-40℃ to +85℃; see Figure 5; VCC=2.7V | 9 |
| A, B to Y propagation delay (HIGH-to-LOW) | tPHL |  | 9.5 | 14.3 | ns | Tamb=-40℃ to +85℃; see Figure 5; VCC=3.0V to 3.6V | 9 |
| A, B to Y propagation delay (HIGH-to-LOW) | tPHL |  | 9 | 13.5 | ns | Tamb=-40℃ to +85℃; see Figure 5; VCC=4.5V to 5.5V | 9 |
| A, B to Y propagation delay (LOW-to-HIGH) | tPLH |  | 14 | 21 | ns | Tamb=-40℃ to +85℃; see Figure 5; VCC=1.65V to 1.95V | 9 |
| A, B to Y propagation delay (LOW-to-HIGH) | tPLH |  | 10 | 15 | ns | Tamb=-40℃ to +85℃; see Figure 5; VCC=2.3V to 2.7V | 9 |
| A, B to Y propagation delay (LOW-to-HIGH) | tPLH |  | 9.5 | 14.3 | ns | Tamb=-40℃ to +85℃; see Figure 5; VCC=2.7V | 9 |
| A, B to Y propagation delay (LOW-to-HIGH) | tPLH |  | 8.5 | 12.8 | ns | Tamb=-40℃ to +85℃; see Figure 5; VCC=3.0V to 3.6V | 9 |
| A, B to Y propagation delay (LOW-to-HIGH) | tPLH |  | 7.5 | 11.3 | ns | Tamb=-40℃ to +85℃; see Figure 5; VCC=4.5V to 5.5V | 9 |
| A, B to Y propagation delay (HIGH-to-LOW) | tPHL |  |  | 20.8 | ns | Tamb=-40℃ to +125℃; see Figure 5; VCC=1.65V to 1.95V | 9 |
| A, B to Y propagation delay (HIGH-to-LOW) | tPHL |  |  | 17.8 | ns | Tamb=-40℃ to +125℃; see Figure 5; VCC=2.3V to 2.7V | 9 |
| A, B to Y propagation delay (HIGH-to-LOW) | tPHL |  |  | 17 | ns | Tamb=-40℃ to +125℃; see Figure 5; VCC=2.7V | 9 |
| A, B to Y propagation delay (HIGH-to-LOW) | tPHL |  |  | 16.3 | ns | Tamb=-40℃ to +125℃; see Figure 5; VCC=3.0V to 3.6V | 9 |
| A, B to Y propagation delay (HIGH-to-LOW) | tPHL |  |  | 15.5 | ns | Tamb=-40℃ to +125℃; see Figure 5; VCC=4.5V to 5.5V | 9 |
| A, B to Y propagation delay (LOW-to-HIGH) | tPLH |  |  | 23 | ns | Tamb=-40℃ to +125℃; see Figure 5; VCC=1.65V to 1.95V | 9 |
| A, B to Y propagation delay (LOW-to-HIGH) | tPLH |  |  | 17 | ns | Tamb=-40℃ to +125℃; see Figure 5; VCC=2.3V to 2.7V | 9 |
| A, B to Y propagation delay (LOW-to-HIGH) | tPLH |  |  | 16.3 | ns | Tamb=-40℃ to +125℃; see Figure 5; VCC=2.7V | 9 |
| A, B to Y propagation delay (LOW-to-HIGH) | tPLH |  |  | 14.8 | ns | Tamb=-40℃ to +125℃; see Figure 5; VCC=3.0V to 3.6V | 9 |
| A, B to Y propagation delay (LOW-to-HIGH) | tPLH |  |  | 13.3 | ns | Tamb=-40℃ to +125℃; see Figure 5; VCC=4.5V to 5.5V | 9 |

## CAD (KiCad official)

- Symbol: `SN74LVC1G08DB`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `sn74lvc1g08db-etched.step` / `sn74lvc1g08db-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvc1g08db.step` / `sn74lvc1g08db.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [lingxingic datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603362339161202688) (15 pp, sha256 `bc71f63a4defe976`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74lvc1g08db-datasheet.pdf)