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Contents

README

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SN74LVC1G04DRLR

TECH PUBLIC · Logic Gates · SOT-553

SN74LVC1G04DRLR from TECH PUBLIC, in a SOT-553. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection; leave unconnected.
2 A input Logic input to the single inverter gate; VIH min 0.7×VCC and VIL max 0.3×VCC (VCC = 1.65 V-1.95 V), with input voltage range -0.5 V to 6.5 V.
3 GND power_in Ground reference; 0 V supply return for the device.
4 Y output Inverter logic output (Y = Ā); VOH min 0.8×VCC and VOL max 0.1×VCC at light load, with ±24 mA drive capability at VCC = 3.3 V.
5 VCC power_in Positive supply voltage; operating range 1.65 V to 5.5 V, with quiescent supply current ICC max 10 µA.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-553
Category Logic
Pins 5

CAD (KiCad official)

  • Symbol: SN74LVC1G04DRLR
  • Footprint: Package_TO_SOT_SMD:SOT-553
  • 3D model: SOT-553 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc1g04drlr-etched.step / sn74lvc1g04drlr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc1g04drlr.step / sn74lvc1g04drlr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (7 pp, sha256 20513a49e0ef2439, retrieved 2026-09-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-4-6 (vision), consensus claude-opus-4-7 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF