component
SN74LVC1G02MDCKREP
Public Made by Adomby adom
Texas Instruments Logic Gates, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+41@@ -0,0 +1,41 @@+# SN74LVC1G02MDCKREP++**Texas Instruments** · Logic Gates · SC-70-5++SN74LVC1G02MDCKREP from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | NOR gate input A; accepts input voltages from 0 to 5.5 V per VI specification. |+| 2 | B | input | NOR gate input B; accepts input voltages from 0 to 5.5 V per VI specification. |+| 3 | GND | power_in | Ground; system reference point; supports continuous current up to ±100 mA. |+| 4 | Y | output | NOR gate output; Y = A + B per positive logic; output voltage 0 to VCC with continuous current ±50 mA. |+| 5 | VCC | power_in | Supply voltage; operating range 1.65 V to 5.5 V; supports continuous current up to ±100 mA. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SC-70-5 |+| Category | Logic |+| Pins | 5 |++## CAD (KiCad official)++- Symbol: `SN74LVC1G02MDCKREP`+- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`+- 3D model: SC-70-5 (KiCad packages3D, STEP)+- 3D model files: `sn74lvc1g02mdckrep-etched.step` / `sn74lvc1g02mdckrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvc1g02mdckrep.step` / `sn74lvc1g02mdckrep.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74lvc1g02-ep) (15 pp, sha256 `6f7552d6aea2fb80`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74lvc1g02mdckrep-datasheet.pdf)
page.jsonadded+141@@ -0,0 +1,141 @@+{+ "slug": "sn74lvc1g02mdckrep",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Logic Gates, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "sn74lvc1g02mdckrep",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "sn74lvc1g02mdckrep.kicad_sym",+ "sn74lvc1g02mdckrep.kicad_mod",+ "sn74lvc1g02mdckrep.glb",+ "sn74lvc1g02mdckrep.step",+ "sn74lvc1g02mdckrep.lbr",+ "docs/hero.png",+ "docs/sn74lvc1g02mdckrep-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "sn74lvc1g02mdckrep-hero.glb",+ "sn74lvc1g02mdckrep-hero.overlay.json"+ ],+ "component": {+ "mpn": "SN74LVC1G02MDCKREP",+ "manufacturer": "Texas Instruments",+ "package": "SC-70-5",+ "pin_count": 5,+ "category": "Logic",+ "subcategory": "Logic Gates",+ "datasheet": "https://www.ti.com/cn/lit/gpn/sn74lvc1g02-ep",+ "parts": {+ "symbol": "sn74lvc1g02mdckrep.kicad_sym",+ "footprint": "sn74lvc1g02mdckrep.kicad_mod",+ "model_3d": "sn74lvc1g02mdckrep-hero.glb",+ "model_3d_plain": "sn74lvc1g02mdckrep.glb",+ "model_3d_step": "sn74lvc1g02mdckrep-etched.step",+ "model_3d_step_plain": "sn74lvc1g02mdckrep.step",+ "lbr": "sn74lvc1g02mdckrep.lbr"+ },+ "distributor_links": {+ "lcsc": 2861737,+ "digikey": "296-22340-2-ND",+ "mouser": "595-SN74LVC02MDCKREP"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T09:20:36Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-22340-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-SN74LVC02MDCKREP",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "A",+ "type": "input",+ "description": "NOR gate input A; accepts input voltages from 0 to 5.5 V per VI specification."+ },+ {+ "number": "2",+ "name": "B",+ "type": "input",+ "description": "NOR gate input B; accepts input voltages from 0 to 5.5 V per VI specification."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground; system reference point; supports continuous current up to ±100 mA."+ },+ {+ "number": "4",+ "name": "Y",+ "type": "output",+ "description": "NOR gate output; Y = A + B per positive logic; output voltage 0 to VCC with continuous current ±50 mA."+ },+ {+ "number": "5",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage; operating range 1.65 V to 5.5 V; supports continuous current up to ±100 mA."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin numbering inferred from SC-70 package standard conventions; datasheet PAGE 1 shows DCK package d"+ ],+ "pages_sent": 15,+ "cost_usd": 0.1028,+ "at": "2026-10-03T09:20:11"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/sn74lvc1g02-ep",+ "pages": 15,+ "sha256": "6f7552d6aea2fb80",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 5,+ "described": 5,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}