SN74LVC1G00DCKR-MS

{
  "slug": "sn74lvc1g00dckr-ms",
  "version": "0.1.0",
  "type": "component",
  "description": "MSKSEMI Logic Gates, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "sn74lvc1g00dckr-ms",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74lvc1g00dckr-ms.kicad_sym",
    "sn74lvc1g00dckr-ms.kicad_mod",
    "sn74lvc1g00dckr-ms.glb",
    "sn74lvc1g00dckr-ms.step",
    "sn74lvc1g00dckr-ms.lbr",
    "docs/hero.png",
    "docs/sn74lvc1g00dckr-ms-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sn74lvc1g00dckr-ms-hero.glb",
    "sn74lvc1g00dckr-ms-hero.overlay.json",
    "sn74lvc1g00dckr-ms-etched.glb"
  ],
  "component": {
    "mpn": "SN74LVC1G00DCKR-MS",
    "manufacturer": "MSKSEMI",
    "package": "SC-70-5",
    "pin_count": 5,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603082787902021632",
    "parts": {
      "symbol": "sn74lvc1g00dckr-ms.kicad_sym",
      "footprint": "sn74lvc1g00dckr-ms.kicad_mod",
      "model_3d": "sn74lvc1g00dckr-ms-hero.glb",
      "model_3d_plain": "sn74lvc1g00dckr-ms-etched.glb",
      "model_3d_step": "sn74lvc1g00dckr-ms-etched.step",
      "model_3d_step_plain": "sn74lvc1g00dckr-ms.step",
      "lbr": "sn74lvc1g00dckr-ms.lbr"
    },
    "distributor_links": {
      "lcsc": "C7434168"
    },
    "distributor_check": {
      "checked_at": "2026-10-17T23:00:07Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "A",
        "type": "input",
        "description": "Data input A of the 2-input NAND gate; the datasheet limits input voltage VI to 0 to 5.5 V."
      },
      {
        "number": "2",
        "name": "B",
        "type": "input",
        "description": "Data input B of the 2-input NAND gate; the datasheet limits input voltage VI to 0 to 5.5 V."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference pin for the device."
      },
      {
        "number": "4",
        "name": "Y",
        "type": "output",
        "description": "NAND gate output Y, which swings between 0 and VCC; the datasheet gives IOH up to -32 mA and IOL up to 32 mA at VCC = 4.5 V."
      },
      {
        "number": "5",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply pin; the operating supply range is 1.65 V to 5.5 V and the absolute maximum is 6.5 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin table on page 2 lists pin numbers in one column for DBV/DCK/DRL/YZP, so the DCK (SC70-5) num; Pin 5 is VCC and pin 4 is Y in the DCK column, while the DRY/DSF column differs (NC on pin 5, VCC on; The DCK reel table on page 6 confirms SN74LVC1G00DCKR-MS is SC70-5, 3000 pcs, matching the requested"
        ],
        "pages_sent": 12,
        "cost_usd": 0.0331,
        "at": "2026-10-17T22:58:04"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603082787902021632",
        "pages": 12,
        "sha256": "02fd3fb7831cfc6b",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 5,
        "described": 5,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "sn74lvc1g00dckr-ms.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2860de5b7b085919ff6e952148353f928798588d9f544dc69430545aff2ba908",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74lvc1g00dckr-ms-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e647ed8b0657b9ca95b566833514c727223c08bca71ed63f4b9f8371ba24aeba",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}