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SN74LVC138APWR

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Texas Instruments Signal Switches / Encoders & Decoders / Multiplexers, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74LVC138APWR

Texas Instruments · Signal Switches / Encoders & Decoders / Multiplexers · TSSOP-16

SN74LVC138APWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Address/select input A (LSB of 3-bit binary select). CMOS input, accepts 0 to 5.5 V regardless of VCC.
2 B input Address/select input B (middle bit of 3-bit binary select). CMOS input, accepts 0 to 5.5 V regardless of VCC.
3 C input Address/select input C (MSB of 3-bit binary select). CMOS input, accepts 0 to 5.5 V regardless of VCC.
4 G2A input Active-low enable input. All outputs are forced high (inactive) when G2A is high.
5 G2B input Active-low enable input. All outputs are forced high (inactive) when G2B is high.
6 G1 input Active-high enable input. All outputs are forced high (inactive) when G1 is low.
7 Y7 output Active-low decoded output 7. Asserted low when C=1, B=1, A=1 and all enables are active. Push-pull CMOS output, ±24 mA drive at VCC=3.3 V.
8 GND power_in Ground reference (0 V).
9 Y6 output Active-low decoded output 6. Asserted low when C=1, B=1, A=0 and all enables are active. Push-pull CMOS output, ±24 mA drive at VCC=3.3 V.
10 Y5 output Active-low decoded output 5. Asserted low when C=1, B=0, A=1 and all enables are active. Push-pull CMOS output, ±24 mA drive at VCC=3.3 V.
11 Y4 output Active-low decoded output 4. Asserted low when C=1, B=0, A=0 and all enables are active. Push-pull CMOS output, ±24 mA drive at VCC=3.3 V.
12 Y3 output Active-low decoded output 3. Asserted low when C=0, B=1, A=1 and all enables are active. Push-pull CMOS output, ±24 mA drive at VCC=3.3 V.
13 Y2 output Active-low decoded output 2. Asserted low when C=0, B=1, A=0 and all enables are active. Push-pull CMOS output, ±24 mA drive at VCC=3.3 V.
14 Y1 output Active-low decoded output 1. Asserted low when C=0, B=0, A=1 and all enables are active. Push-pull CMOS output, ±24 mA drive at VCC=3.3 V.
15 Y0 output Active-low decoded output 0. Asserted low when C=0, B=0, A=0 and all enables are active. Push-pull CMOS output, ±24 mA drive at VCC=3.3 V.
16 VCC power_in Supply voltage, 1.65 V to 3.6 V operating range (absolute max 4.6 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC138APWR
  • SN74LVC138APWRDR
  • SN74LVC138APWRD
  • SN74LVC138APWRRGYR
  • SN74LVC138APWRRGY
  • SN74LVC138APWRDBR
  • SN74LVC138APWRDB

CAD (KiCad official)

  • Symbol: SN74LVC138APWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc138apwr-etched.step / sn74lvc138apwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc138apwr.step / sn74lvc138apwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 ac45cc709217a5b8, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF