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SN74LVC126ADR

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Texas Instruments Buffer/Driver/Transceiver, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Datasheet

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Contents

README

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SN74LVC126ADR

Texas Instruments · Buffer/Driver/Transceiver · SOIC-14

SN74LVC126ADR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable for buffer 1. Active high: when 1OE = H the 1Y output follows 1A; when 1OE = L the 1Y output is placed in the high-impedance (Hi-Z) state.
2 1A input Gate 1 data input. CMOS input, 5.5 V tolerant regardless of VCC (1.65-3.6 V), allowing 5 V drivers into a 3.3 V system.
3 1Y tri_state Gate 1 3-state output. Drives Y = A when 1OE is high; high-impedance when 1OE is low. Guaranteed drive of ±24 mA at VCC = 3 V.
4 2OE input Output enable for buffer 2. Active high: enables 2Y = 2A when H, Hi-Z when L.
5 2A input Gate 2 data input. 5.5 V-tolerant CMOS input.
6 2Y tri_state Gate 2 3-state output. Y = A when 2OE is high; Hi-Z when 2OE is low.
7 GND power_in Ground reference (0 V) for the device.
8 3Y tri_state Gate 3 3-state output. Y = A when 3OE is high; Hi-Z when 3OE is low.
9 3A input Gate 3 data input. 5.5 V-tolerant CMOS input.
10 3OE input Output enable for buffer 3. Active high: enables 3Y = 3A when H, Hi-Z when L.
11 4Y tri_state Gate 4 3-state output. Y = A when 4OE is high; Hi-Z when 4OE is low.
12 4A input Gate 4 data input. 5.5 V-tolerant CMOS input.
13 4OE input Output enable for buffer 4. Active high: enables 4Y = 4A when H, Hi-Z when L.
14 VCC power_in Positive supply rail, 1.65 V to 3.6 V operating (1.5 V minimum for data retention). Bypass with a local decoupling capacitor to GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC126ADR
  • SN74LVC126ADRD
  • SN74LVC126ADRDBR
  • SN74LVC126ADRDB
  • SN74LVC126ADRDGVR
  • SN74LVC126ADRDGV
  • SN74LVC126ADRNSR
  • SN74LVC126ADRNS
  • SN74LVC126ADRPWR
  • SN74LVC126ADRPW
  • SN74LVC126ADRBQAR
  • SN74LVC126ADRBQA
  • SN74LVC126ADRRGYR
  • SN74LVC126ADRRGY

CAD (KiCad official)

  • Symbol: SN74LVC126ADR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc126adr-etched.step / sn74lvc126adr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc126adr.step / sn74lvc126adr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 7f8920844d07941b, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF