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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	sn74lvc126adbr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
viewers	sn74lvc126adbr: viewers · Ray	5d ago
package.json	Publish 0.1.0 · Ray	5d ago
page.json	Set visibility: public · Ray	5d ago
README.md	Initial commit: component/sn74lvc126adbr · Ray	5d ago
sn74lvc126adbr-etched.fit.json	sn74lvc126adbr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
sn74lvc126adbr-etched.glb	sn74lvc126adbr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
sn74lvc126adbr-etched.step	sn74lvc126adbr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	3d ago
sn74lvc126adbr.glb	Publish 0.1.0 · Ray	5d ago
sn74lvc126adbr.kicad_mod	Publish 0.1.0 · Ray	5d ago
sn74lvc126adbr.kicad_sym	Publish 0.1.0 · Ray	5d ago
sn74lvc126adbr.lbr	Publish 0.1.0 · Ray	5d ago
sn74lvc126adbr.step	Publish 0.1.0 · Ray	5d ago

SN74LVC126ADBR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SSOP-14-208mil

SN74LVC126ADBR from Texas Instruments, in a SSOP-14-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1OE	input	Output Enable 1 input; tri-state control for output 1Y; active low, input accepts 0 to 5.5V.
2	1A	input	Gate 1 input; data input to buffer 1; input accepts 0 to 5.5V.
3	1Y	output	Gate 1 tri-state output; Y = A when 1OE high, high-impedance when 1OE low; output swing 0 to VCC.
4	2OE	input	Output Enable 2 input; tri-state control for output 2Y; active low, input accepts 0 to 5.5V.
5	2A	input	Gate 2 input; data input to buffer 2; input accepts 0 to 5.5V.
6	2Y	output	Gate 2 tri-state output; Y = A when 2OE high, high-impedance when 2OE low; output swing 0 to VCC.
7	GND	power_in	Ground pin; connect to circuit ground and expose thermal pad for optimal thermal performance.
8	3Y	output	Gate 3 tri-state output; Y = A when 3OE high, high-impedance when 3OE low; output swing 0 to VCC.
9	3A	input	Gate 3 input; data input to buffer 3; input accepts 0 to 5.5V.
10	3OE	input	Output Enable 3 input; tri-state control for output 3Y; active low, input accepts 0 to 5.5V.
11	4Y	output	Gate 4 tri-state output; Y = A when 4OE high, high-impedance when 4OE low; output swing 0 to VCC.
12	4A	input	Gate 4 input; data input to buffer 4; input accepts 0 to 5.5V.
13	4OE	input	Output Enable 4 input; tri-state control for output 4Y; active low, input accepts 0 to 5.5V.
14	VCC	power_in	Power supply pin; operating voltage range 1.65V to 3.6V, each VCC pin requires 0.1µF bypass capacitor.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SSOP-14-208mil
Category	Logic
Pins	14

CAD (KiCad official)

Symbol: SN74LVC126ADBR
Footprint: Package_SO:SSOP-14_5.3x6.2mm_P0.65mm
3D model: SSOP-14-208mil (KiCad packages3D, STEP)
3D model files: sn74lvc126adbr-etched.step / sn74lvc126adbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc126adbr.step / sn74lvc126adbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (36 pp, sha256 5c07ecce9f746ff4, retrieved 2026-10-01, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF