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SN74LVC10ADR

Public Made by Adom

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Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs sn74lvc10adr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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README.md Initial commit: component/sn74lvc10adr · Ray 4d ago
sn74lvc10adr-etched.fit.json sn74lvc10adr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74lvc10adr-etched.glb sn74lvc10adr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74lvc10adr-etched.step sn74lvc10adr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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SN74LVC10ADR

Texas Instruments · Logic Gates · SOIC-14

SN74LVC10ADR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input A for 3-input NAND gate channel 1; accepts voltage range 0V to 5.5V
2 1B input Input B for 3-input NAND gate channel 1; accepts voltage range 0V to 5.5V
3 2A input Input A for 3-input NAND gate channel 2; accepts voltage range 0V to 5.5V
4 2B input Input B for 3-input NAND gate channel 2; accepts voltage range 0V to 5.5V
5 2C input Input C for 3-input NAND gate channel 2; accepts voltage range 0V to 5.5V
6 2Y output NAND output for gate channel 2; produces logic output voltage range 0V to VCC
7 GND power_in Ground reference for device operation
8 3Y output NAND output for gate channel 3; produces logic output voltage range 0V to VCC
9 3A input Input A for 3-input NAND gate channel 3; accepts voltage range 0V to 5.5V
10 3B input Input B for 3-input NAND gate channel 3; accepts voltage range 0V to 5.5V
11 3C input Input C for 3-input NAND gate channel 3; accepts voltage range 0V to 5.5V
12 1Y output NAND output for gate channel 1; produces logic output voltage range 0V to VCC
13 1C input Input C for 3-input NAND gate channel 1; accepts voltage range 0V to 5.5V
14 VCC power_in Positive supply voltage; recommended operating range 1.65V to 3.6V

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74LVC10ADR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc10adr-etched.step / sn74lvc10adr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc10adr.step / sn74lvc10adr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 ffbed261dcf61c42, retrieved 2026-10-01, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF