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Contents

README

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SN74LVC06ADR

Texas Instruments · Inverters · SOIC-14

SN74LVC06ADR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Inverter 1 input. CMOS logic input; accepts 0 V to 5.5 V regardless of VCC (1.65-3.6 V), enabling 5-V to 3.3-V translation.
2 1Y output Inverter 1 output. Open-drain; requires an external pull-up. Sinks up to 24 mA at VCC = 3 V; tolerant to 5.5 V for wired-OR / wired-AND and level shifting.
3 2A input Inverter 2 input. CMOS logic input; accepts 0 V to 5.5 V regardless of VCC.
4 2Y output Inverter 2 output. Open-drain; requires external pull-up. IOL up to 24 mA at VCC = 3 V.
5 3A input Inverter 3 input. CMOS logic input; accepts 0 V to 5.5 V regardless of VCC.
6 3Y output Inverter 3 output. Open-drain; requires external pull-up. IOL up to 24 mA at VCC = 3 V.
7 GND power_in Device ground reference (0 V).
8 4Y output Inverter 4 output. Open-drain; requires external pull-up. IOL up to 24 mA at VCC = 3 V.
9 4A input Inverter 4 input. CMOS logic input; accepts 0 V to 5.5 V regardless of VCC.
10 5Y output Inverter 5 output. Open-drain; requires external pull-up. IOL up to 24 mA at VCC = 3 V.
11 5A input Inverter 5 input. CMOS logic input; accepts 0 V to 5.5 V regardless of VCC.
12 6Y output Inverter 6 output. Open-drain; requires external pull-up. IOL up to 24 mA at VCC = 3 V.
13 6A input Inverter 6 input. CMOS logic input; accepts 0 V to 5.5 V regardless of VCC.
14 VCC power_in Supply voltage. Operating range 1.65 V to 3.6 V; data retention down to 1.5 V. Bypass locally with a 0.1 uF ceramic to GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC06ADR
  • SN74LVC06ADRADT
  • SN74LVC06ADRADE4
  • SN74LVC06ADRE4
  • SN74LVC06ADRADBR
  • SN74LVC06ADRADGVR
  • SN74LVC06ADRANSR
  • SN74LVC06ADRAPW
  • SN74LVC06ADRAPWR
  • SN74LVC06ADRAPWT
  • SN74LVC06ADRAPWG4
  • SN74LVC06ADRAPWRG4
  • SN74LVC06ADRAPWRE4
  • SN74LVC06ADRARGYR
  • SN74LVC06ADRARGYRG4

CAD (KiCad official)

  • Symbol: SN74LVC06ADR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc06adr-etched.step / sn74lvc06adr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc06adr.step / sn74lvc06adr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 97441173bfed2369, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF