main
Ray sn74lv8154pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… 5b110ae 9d ago
{
  "slug": "sn74lv8154pwr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Counters, Dividers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "sn74lv8154pwr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74lv8154pwr.kicad_sym",
    "sn74lv8154pwr.kicad_mod",
    "sn74lv8154pwr.glb",
    "sn74lv8154pwr.step",
    "sn74lv8154pwr.lbr",
    "docs/hero.png",
    "docs/sn74lv8154pwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sn74lv8154pwr-hero.glb",
    "sn74lv8154pwr-hero.overlay.json"
  ],
  "component": {
    "mpn": "SN74LV8154PWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Logic",
    "subcategory": "Counters, Dividers",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74lv8154.pdf",
    "parts": {
      "symbol": "sn74lv8154pwr.kicad_sym",
      "footprint": "sn74lv8154pwr.kicad_mod",
      "model_3d": "sn74lv8154pwr-hero.glb",
      "model_3d_plain": "sn74lv8154pwr.glb",
      "model_3d_step": "sn74lv8154pwr-etched.step",
      "model_3d_step_plain": "sn74lv8154pwr.step",
      "lbr": "sn74lv8154pwr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2675496",
      "digikey": "296-47353-2-ND",
      "mouser": "595-SN74LV8154PWR"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T09:17:12Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-47353-2-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-SN74LV8154PWR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CLKA",
        "type": "input",
        "description": "Clock A is the rising-edge count clock for counter A, with a minimum high or low pulse width of 10 ns."
      },
      {
        "number": "2",
        "name": "CLKB",
        "type": "input",
        "description": "Clock B is the rising-edge count clock for counter B, with a minimum high or low pulse width of 10 ns, and is gated by CLKBEN."
      },
      {
        "number": "3",
        "name": "GAL",
        "type": "input",
        "description": "Gate A lower byte; active-low puts the lower byte of stored counter A on the Y bus, and all four gates high puts Y in high impedance."
      },
      {
        "number": "4",
        "name": "GAU",
        "type": "input",
        "description": "Gate A upper byte; active-low puts the upper byte of stored counter A on the Y bus, and all four gates high puts Y in high impedance."
      },
      {
        "number": "5",
        "name": "GBL",
        "type": "input",
        "description": "Gate B lower byte; active-low puts the lower byte of stored counter B on the Y bus, and all four gates high puts Y in high impedance."
      },
      {
        "number": "6",
        "name": "GBU",
        "type": "input",
        "description": "Gate B upper byte; active-low puts the upper byte of stored counter B on the Y bus, and all four gates high puts Y in high impedance."
      },
      {
        "number": "7",
        "name": "RCLK",
        "type": "input",
        "description": "Register clock; the rising edge stores both counters into the internal storage register, with a minimum pulse width of 10 ns."
      },
      {
        "number": "8",
        "name": "RCOA",
        "type": "output",
        "description": "Ready case overflow A is active-low when counter A is at full count and ready to overflow on the next CLKA clock."
      },
      {
        "number": "9",
        "name": "CLKBEN",
        "type": "input",
        "description": "Clock B enable is active-low and allows counter B to be clocked; connect it to RCOA for a 32-bit counter."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "11",
        "name": "CCLR",
        "type": "input",
        "description": "Asynchronous active-low clear for both counters, requiring a low time of at least 20 ns."
      },
      {
        "number": "12",
        "name": "Y7",
        "type": "output",
        "description": "Data output bit 7 (MSB) of the 8-bit mapped read bus, which is set to high impedance when all four gates are high."
      },
      {
        "number": "13",
        "name": "Y6",
        "type": "output",
        "description": "Data output bit 6 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high."
      },
      {
        "number": "14",
        "name": "Y5",
        "type": "output",
        "description": "Data output bit 5 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high."
      },
      {
        "number": "15",
        "name": "Y4",
        "type": "output",
        "description": "Data output bit 4 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high."
      },
      {
        "number": "16",
        "name": "Y3",
        "type": "output",
        "description": "Data output bit 3 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high."
      },
      {
        "number": "17",
        "name": "Y2",
        "type": "output",
        "description": "Data output bit 2 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high."
      },
      {
        "number": "18",
        "name": "Y1",
        "type": "output",
        "description": "Data output bit 1 of the 8-bit mapped read bus, which is set to high impedance when all four gates are high."
      },
      {
        "number": "19",
        "name": "Y0",
        "type": "output",
        "description": "Data output bit 0 (LSB) of the 8-bit mapped read bus, which is set to high impedance when all four gates are high."
      },
      {
        "number": "20",
        "name": "VCC",
        "type": "power_in",
        "description": "Power supply pin; the device operates from 2 V to 5.5 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet lists Y0-Y7 as type O (output), but the device has 3-state output registers and the fu; The pin table lists RCOA as O with no separate electrical limits; typed as output per the datasheet."
        ],
        "pages_sent": 24,
        "cost_usd": 0.0863,
        "at": "2026-10-11T09:16:54"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74lv8154.pdf",
        "pages": 24,
        "sha256": "7ab3edfeccfab88d",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "sn74lv8154pwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74lv8154pwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "cc0f7c3598a3d11935139d27444662740ded86993f72c27866a2de1492d77f36",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}