component
SN74LV74AQPWRG4Q1
Public Made by Adomby adom
Texas Instruments Flip Flops, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LV74AQPWRG4Q1
Texas Instruments · Flip Flops · TSSOP-14
SN74LV74AQPWRG4Q1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 CLR | input | Active-low clear input for flip-flop 1; low level resets Q output and sets Q output independent of other inputs |
| 2 | 1D | input | Data input for flip-flop 1; data transferred to Q output on positive clock edge when PRE and CLR are inactive |
| 3 | 1CLK | input | Clock input for flip-flop 1; positive-edge triggered, transfers data from D to Q |
| 4 | 1 PRE | input | Active-low preset input for flip-flop 1; low level sets Q output and resets Q output independent of other inputs |
| 5 | 1Q | output | Q output for flip-flop 1; driven by positive clock edge and data input when PRE and CLR inactive |
| 6 | 1 Q | output | Inverted Q output for flip-flop 1; complement of Q output |
| 7 | GND | power_in | Ground reference |
| 8 | 2 Q | output | Inverted Q output for flip-flop 2; complement of Q output |
| 9 | 2Q | output | Q output for flip-flop 2; driven by positive clock edge and data input when PRE and CLR inactive |
| 10 | 2 PRE | input | Active-low preset input for flip-flop 2; low level sets Q output and resets Q output independent of other inputs |
| 11 | 2CLK | input | Clock input for flip-flop 2; positive-edge triggered, transfers data from D to Q |
| 12 | 2D | input | Data input for flip-flop 2; data transferred to Q output on positive clock edge when PRE and CLR are inactive |
| 13 | 2 CLR | input | Active-low clear input for flip-flop 2; low level resets Q output and sets Q output independent of other inputs |
| 14 | Vcc | power_in | Supply voltage input; operating range 2 V to 5.5 V per section 5.3 Recommended Operating Conditions |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74LV74AQPWRG4Q1 - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74lv74aqpwrg4q1-etched.step/sn74lv74aqpwrg4q1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv74aqpwrg4q1.step/sn74lv74aqpwrg4q1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
105aff0871fbcd66, retrieved 2026-09-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).