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Contents

README

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SN74LV6T17PWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-14

SN74LV6T17PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Channel 1 input A of the Schmitt-trigger buffer, which performs Y = A in positive logic.
2 1Y output Channel 1 output Y, referenced to the supply voltage VCC and supporting 1.8 V, 2.5 V, 3.3 V and 5 V CMOS levels.
3 2A input Channel 2 input A of the Schmitt-trigger buffer, which performs Y = A in positive logic.
4 2Y output Channel 2 output Y, referenced to the supply voltage VCC and supporting 1.8 V, 2.5 V, 3.3 V and 5 V CMOS levels.
5 3A input Channel 3 input A of the Schmitt-trigger buffer, which performs Y = A in positive logic.
6 3Y output Channel 3 output Y, referenced to the supply voltage VCC and supporting 1.8 V, 2.5 V, 3.3 V and 5 V CMOS levels.
7 GND power_in Ground reference for the device.
8 4Y output Channel 4 output Y, referenced to the supply voltage VCC and supporting 1.8 V, 2.5 V, 3.3 V and 5 V CMOS levels.
9 4A input Channel 4 input A of the Schmitt-trigger buffer, which performs Y = A in positive logic.
10 5Y output Channel 5 output Y, referenced to the supply voltage VCC and supporting 1.8 V, 2.5 V, 3.3 V and 5 V CMOS levels.
11 5A input Channel 5 input A of the Schmitt-trigger buffer, which performs Y = A in positive logic.
12 6Y output Channel 6 output Y, referenced to the supply voltage VCC and supporting 1.8 V, 2.5 V, 3.3 V and 5 V CMOS levels.
13 6A input Channel 6 input A of the Schmitt-trigger buffer, which performs Y = A in positive logic.
14 VCC power_in Positive supply; the output levels are referenced to this supply voltage.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 4
Input voltage range VI -0.5 7 V 4
Voltage range applied to any output in high-impedance or power-off state VO -0.5 7 V 4
Output voltage range VO -0.5 V max printed as VCC + 0.5 V 4
Input clamp current IIK -20 mA VI < -0.5 V 4
Output clamp current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
Continuous output current IO -25 25 mA VO = 0 to VCC 4
Continuous output current through VCC or GND -50 50 mA 4
Storage temperature Tstg -65 150 °C 4
Supply voltage VCC 1.6 5.5 V 5
Input voltage VI 0 5.5 V 5
Output voltage VO 0 V max printed as VCC 5
High-level input voltage VIH 1.1 V VCC = 1.65 V to 2 V 5
High-level input voltage VIH 1.28 V VCC = 2.25 V to 2.75 V 5
High-level input voltage VIH 1.45 V VCC = 3 V to 3.6 V 5
High-level input voltage VIH 2 V VCC = 4.5 V to 5.5 V 5
Low-level input voltage VIL 0.5 V VCC = 1.65 V to 2 V 5
Low-level input voltage VIL 0.65 V VCC = 2.25 V to 2.75 V 5
Low-level input voltage VIL 0.75 V VCC = 3 V to 3.6 V 5
Low-level input voltage VIL 0.85 V VCC = 4.5 V to 5.5 V 5
Output current IO -3 3 mA VCC = 1.6 V to 2 V 5
Output current IO -7 7 mA VCC = 2.25 V to 2.75 V 5
Output current IO -15 15 mA VCC = 3.3 V to 5.0 V 5
Input transition rise or fall rate Δt/Δv 20 ns/V VCC = 1.6 V to 5.0 V 5
Operating free-air temperature TA -40 125 °C 5
Positive-going input threshold voltage VT+ 0.5 1.2 1.27 V VCC = 1.65 V to 2 V 6
Positive-going input threshold voltage VT+ 0.64 1.39 1.44 V VCC = 2.25 V to 2.75 V 6
Positive-going input threshold voltage VT+ 0.8 1.59 1.63 V VCC = 3 V to 3.6 V 6
Positive-going input threshold voltage VT+ 1.1 2.03 2.07 V VCC = 4.5 V to 5.5 V 6
Negative-going input threshold voltage VT- 0.185 0.685 0.755 V VCC = 1.65 V to 2 V 6
Negative-going input threshold voltage VT- 0.265 0.775 0.805 V VCC = 2.25 V to 2.75 V 6
Negative-going input threshold voltage VT- 0.345 0.875 0.895 V VCC = 3 V to 3.6 V 6
Negative-going input threshold voltage VT- 0.495 1.075 1.085 V VCC = 4.5 V to 5.5 V 6
Hysteresis (VT+ − VT−) ΔVT 0.28 0.68 0.8 V VCC = 1.65 V to 2 V 6
Hysteresis (VT+ − VT−) ΔVT 0.33 0.77 0.87 V VCC = 2.25 V to 2.75 V 6
Hysteresis (VT+ − VT−) ΔVT 0.38 0.88 0.91 V VCC = 3 V to 3.6 V 6
Hysteresis (VT+ − VT−) ΔVT 0.51 1.2 1.4 V VCC = 4.5 V to 5.5 V 6
High-level output voltage VOH 1.21 1.7 V IOH = -2 mA; VCC = 1.65 V to 2 V 6
High-level output voltage VOH 1.93 2.4 V IOH = -3 mA; VCC = 2.25 V to 2.75 V 6
High-level output voltage VOH 2.49 3.08 V IOH = -5.5 mA; VCC = 3 V to 3.6 V 6
High-level output voltage VOH 3.95 4.65 V IOH = -8 mA; VCC = 4.5 V to 5.5 V 6
Low-level output voltage VOL 0.1 V IOL = 50 uA; VCC = 1.65 V to 5.5 V 6
Low-level output voltage VOL 0.1 0.25 V IOL = 2 mA; VCC = 1.65 V to 2 V 6
Low-level output voltage VOL 0.1 0.2 V IOL = 3 mA; VCC = 2.25 V to 2.75 V 6
Low-level output voltage VOL 0.2 0.25 V IOL = 5.5 mA; VCC = 3 V to 3.6 V 6
Low-level output voltage VOL 0.3 0.35 V IOL = 8 mA; VCC = 4.5 V to 5.5 V 6
Input leakage current II -1 1 µA VI = 0 V or VCC; VCC = 0 V to 5.5 V 6
Supply current ICC 2 20 µA VI = 0 V or VCC, IO = 0; open on loading; VCC = 1.65 V to 5.5 V 6
Additional supply current per input ΔICC 1.35 1.5 mA One input at 0.3 V or 3.4 V, other inputs at 0 or VCC, IO = 0; VCC = 5.5 V 6
Additional supply current per input ΔICC 10 20 µA One input at 0.3 V or 1.1 V, other inputs at 0 or VCC, IO = 0; VCC = 1.8 V 6
Input capacitance CI 4 10 pF VI = VCC or GND; VCC = 5 V 6
Junction-to-ambient thermal resistance (PW, TSSOP-14) RθJA 151 °C/W PW (TSSOP) 14-pin package 5
Junction-to-case (top) thermal resistance (PW, TSSOP-14) RθJC(top) 80 °C/W PW (TSSOP) 14-pin package 5
Junction-to-board thermal resistance (PW, TSSOP-14) RθJB 94.2 °C/W PW (TSSOP) 14-pin package 5
Junction-to-top characterization parameter (PW, TSSOP-14) ΨJT 28 °C/W PW (TSSOP) 14-pin package 5
Junction-to-board characterization parameter (PW, TSSOP-14) YJB 93.6 °C/W PW (TSSOP) 14-pin package 5

CAD (KiCad official)

  • Symbol: SN74LV6T17PWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74lv6t17pwr-etched.step / sn74lv6t17pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lv6t17pwr.step / sn74lv6t17pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 c6a734cbcb1ecb2b, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF